参数资料
型号: HYB18T1G160C2F-3.7
厂商: QIMONDA AG
元件分类: DRAM
英文描述: 64M X 16 DDR DRAM, 0.5 ns, PBGA84
封装: GREEN, PLASTIC, TFBGA-84
文件页数: 23/70页
文件大小: 3996K
代理商: HYB18T1G160C2F-3.7
HY[B/I]18T1G[40/80/16]0C2[C/F](L)
1-Gbit Double-Data-Rate-Two SDRAM
Internet Data Sheet
Rev. 1.60, 2008-08
3
09262007-3YK7-BKKG
1Overview
This chapter gives an overview of the 1-Gbit Double-Data-Rate-Two SDRAM product family and describes its main
characteristics.
1.1
Features
The 1-Gbit Double-Data-Rate-Two SDRAM offers the following key features:
1.8 V
± 0.1 V Power Supply
1.8 V
± 0.1 V (SSTL_18) compatible I/O
DRAM organizations with 4,8,16 data in/outputs
Double Data Rate architecture:
– two data transfers per clock cycle
– eight internal banks for concurrent operation
Programmable CAS Latency: 3, 4, 5, 6, 7 and 8
Programmable Burst Length: 4 and 8
Differential clock inputs (CK and CK)
Bi-directional, differential data strobes (DQS and DQS) are
transmitted / received with data. Edge aligned with read
data and center-aligned with write data.
DLL aligns DQ and DQS transitions with clock
DQS can be disabled for single-ended data strobe
operation
Commands entered on each positive clock edge, data and
data mask are referenced to both edges of DQS
Data masks (DM) for write data
Posted CAS by programmable additive latency for better
command and data bus efficiency
Off-Chip-Driver impedance adjustment (OCD) and
On-Die-Termination (ODT) for better signal quality
Auto-Precharge operation for read and write bursts
Auto-Refresh, Self-Refresh and power saving Power-
Down modes
Operating temperature range 0 °C to 95 °C
Industrial temperature range -40 °C to 95 °C
Average Refresh Period 7.8
μs at a T
CASE lower
than 85 °C, 3.9
μs between 85 °C and 95 °C
Programmable self refresh rate via EMRS2 setting
Programmable partial array refresh via EMRS2 settings
DCC enabling via EMRS2 setting
Full and reduced Strength Data-Output Drivers
1KB page size for ×4 and ×8, 2KB page size for ×16
Packages: PG-TFBGA-60, PG-TFBGA-84, P-TFBGA-84,
P-TFBGA-60
All Speed grades faster than DDR2–400 comply with
DDR2–400 timing specifications when run at a clock rate
of 200 MHz.
相关PDF资料
PDF描述
HYB18T1G160CF-2.5 64M X 16 DDR DRAM, 0.4 ns, PBGA84
HYB3117800BSJ-60 2M X 8 FAST PAGE DRAM, 60 ns, PDSO28
HYB3165400AJ-40 16M X 4 FAST PAGE DRAM, 40 ns, PDSO32
HYB39D512160TF-75 MEMORY SPECTRUM
HYB39D512160TF-7F MEMORY SPECTRUM
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