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| 型号： | HYB18T1G160C2F-3.7 |
| 厂商： | QIMONDA AG |
| 元件分类： | DRAM |
| 英文描述： | 64M X 16 DDR DRAM, 0.5 ns, PBGA84 |
| 封装： | GREEN, PLASTIC, TFBGA-84 |
| 文件页数： | 52/70页 |
| 文件大小： | 3996K |
| 代理商： | HYB18T1G160C2F-3.7 |
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HY[B/I]18T1G[40/80/16]0C2[C/F](L)
1-Gbit Double-Data-Rate-Two SDRAM
Internet Data Sheet
Rev. 1.60, 2008-08
56
09262007-3YK7-BKKG
7.4
ODT AC Electrical Characteristics
This chapter describes the ODT AC electrical characteristics.
TABLE 44
ODT AC Characteristics and Operating Conditions for DDR2–1066
Symbol
Parameter / Condition
Values
Unit
Note
Min.
Max.
t
AOND
ODT turn-on delay
2
n
CK
1)
1) ODT turn on time min is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when
the ODT resistance is fully on. Both are measured from
t
AOND, which is interpreted as 2 clock cycles after the clock edge that registered a
first ODT HIGH counting the actual input clock edges.
t
AON
ODT turn-on
t
AC.MIN
t
AC.MAX + 2.575
ns
1)2)3)
2) Timings are specified with DQs and DM input slew rate of 1.0V/ns. See Specific Notes on derating for other slew rate values.
3) When the device is operated with input clock jitter, this parameter needs to be derated by the actual
t
ERR(6-10per) of the input clock (output
deratings are relative to the SDRAM input clock).
For example, if the measured jitter into a DDR2-1066 SDRAM has
t
ERR(6-10per).MIN = - 202 ps and tERR(6-10per).MAX = + 223 ps, then
t
DQSCK.MIN(derated) = tDQSCK.MIN - tERR(6-10per).MAX = - 300 ps - 223 ps = - 523 ps and tDQSCK.MAX(derated) = tDQSCK.MAX - tERR(6-10per).MIN = 300 ps +
202 ps = + 502 ps.
Similarly,
t
LZ.DQ for DDR2-1066 derates to tLZ.DQ,min(derated) = - 700 ps - 223 ps = - 923 ps and
t
LZ.DQ.MAX(derated) = 350 ps + 202 ps = + 552 ps. (Caution on the min/max usage!)
t
AONPD
ODT turn-on (Power-Down Modes)
t
AC.MIN +2
3
t
CK .AVG+ tAC.MAX +1
ns
t
AOFD
ODT turn-off delay
2.5
n
CK
4)5)
4) ODT turn off time min is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Both are measured from
t
AOFD, which is interpreted as 0.5 x tCK.AVG [ns] after the second trailing clock edge counting from the clock edge
that registered a first ODT LOW and by counting the actual input clock edges. For DDR2-1066, this is 0.9375 [ns] (= 0.5 x 1.875 [ns]) after
the second trailing clock edge counting from the clock edge that registered a first ODT LOW and by counting the actual input clock edges.
5) For
t
AOFD of DDR2-1066, the 1/2 clock of nCK in the 2.5 x nCK assumes a tCH.AVG, average input clock HIGH pulse width of 0.5 relative to
t
CK.AVG. tAOF.MIN and tAOF.MAX should each be derated by the same amount as the actual amount of tCH.AVG offset present at the DRAM input
with respect to 0.5. For example, if an input clock has a worst case
t
CH.AVG of 0.48, the tAOF.MAX should be derated by subtracting 0.02 x
t
CK.AVG from it, whereas if an input clock has a worst case tCH.AVG of 0.52, the tAOF.MAX should be derated by adding 0.02 x tCK.AVG to it.
Therefore, we have;
t
AOF.MIN(derated) = tAC.MIN - [0.5 - Min(0.5, tCH.AVG.MIN)] x tCK.AVGtAOF.MAX(derated) = tAC.MAX + 0.6 + [Max(0.5, tCH.AVG.MAX) - 0.5]
x
t
CK.AVGortAOF.MIN(derated) = Min(tAC.MIN, tAC.MIN - [0.5 - tCH.AVG.MIN] x tCK.AVG)tAOF.MAX(derated) = 0.6 + Max(tAC.MAX, tAC.MAX + [tCH.AVG.MAX - 0.5] x t
CK.AVG) where tCH.AVG.MIN and tCH.AVG.MAX are the minimum and maximum of tCH.AVG actually measured atthe DRAM input balls. Note that
these deratings are in addition to the
t
AOF derating per input clock jitter, i.e. tJIT(duty) and tERR(6-10per). However tAC values used in the equations
shown above are from the timing parameter table and are not derated. Thus the final derated values for
t
AOF aretAOF.MIN(derated_final) =
t
AOF.MIN(derated) + { - tJIT.DUT.MAX - tERR(6-10per).MAX }
t
AOF.MAX(derated_final) = tAOF.MAX(derated) + { - tJIT.DUTY.MIN - tERR(6-10per).MIN }
t
AOF
ODT turn-off
t
AC.MIN
t
AC.MAX +0.6
ns
6) When the device is operated with input clock jitter, this parameter needs to be derated by { -
t
JIT.DUTY.MAX - tERR(6-10per).MAX } and { - tJIT.DUTY.MIN
-
t
ERR(6-10per).MIN } of the actual input clock. (output deratings are relative to the SDRAM input clock.)
For example, if the measured jitter into a DDR2-1066 SDRAM has
t
ERR(6-10per).MIN = - 202 ps, tERR(6-10per).MAX = + 223 ps, tJIT.DUTY.MIN = - 66
ps and
t
JIT.DUTY.MAX = + 74 ps, then tAOF.MIN(derated) = tAOF.MIN + { - tJIT.DUTY.MAX - tERR(6-10per).MAX } = - 350 ps + { - 74 ps - 223 ps} = - 647 ps and
t
AOF.MAX(derated) = tAOF.MAX + { - tJIT.DUTY.MIN - tERR(6-10per).MIN } = 950 ps + { 66 ps + 202 ps } = + 1218 ps. (Caution on the min/max usage!)
t
AOFPD
ODT turn-off (Power-Down Modes)
t
AC.MIN + 2
2.5
t
CK.AVG + tAC.MAX +1
ns
t
ANPD
ODT to Power Down Mode Entry Latency 4
—
n
CK
t
AXPD
ODT Power Down Exit Latency
11
—
n
CK
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