参数资料
型号: HYS72T128000EU-2.5-C2
厂商: QIMONDA AG
元件分类: DRAM
英文描述: 128M X 72 DDR DRAM MODULE, 0.4 ns, DMA240
封装: GREEN, UDIMM-240
文件页数: 11/59页
文件大小: 3071K
代理商: HYS72T128000EU-2.5-C2
HYS[64/72]T[128/256]0x0EU–[19F/1.9/25F/2.5/3S]–C2
Unbuffered DDR2 SDRAM Modules
Internet Data Sheet
Rev. 1.00, 2008-06
19
12032007-I9KE-FFWO
DQ/DQS output hold time from DQS
t
QH
t
HP tQHS
—ps
DQ hold skew factor
t
QHS
—250
ps
Average periodic refresh Interval
t
REFI
—7.8
μs
—3.9
μs
Auto-Refresh to Active/Auto-Refresh command
period
t
RFC
127.5
ns
Read preamble
t
RPRE
0.9
1.1
t
CK.AVG
Read postamble
t
RPST
0.4
0.6
t
CK.AVG
Active to active command period for 1KB page
size products
t
RRD
7.5
ns
Internal Read to Precharge command delay
t
RTP
7.5
ns
Write preamble
t
WPRE
0.35
t
CK.AVG
Write postamble
t
WPST
0.4
0.6
t
CK.AVG
Write recovery time
t
WR
15
ns
Internal write to read command delay
t
WTR
7.5
ns
Exit power down to read command
t
XARD
3—
nCK
Exit active power-down mode to read command
(slow exit, lower power)
t
XARDS
10 – AL
nCK
Exit precharge power-down to any valid
command (other than NOP or Deselect)
t
XP
3—
nCK
Exit self-refresh to a non-read command
t
XSNR
t
RFC +10
ns
Exit self-refresh to read command
t
XSRD
200
nCK
Write command to DQS associated clock edges
WL
RL – 1
nCK
Parameter
Symbol
DDR2–1066
Unit
Note
1)2)3)4)5)
6)7)
Min.
Max.
相关PDF资料
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