参数资料
型号: IBM25PPC750CX-CP40-3T
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 466 MHz, RISC PROCESSOR, PBGA256
封装: PLASTIC, BGA-256
文件页数: 6/43页
文件大小: 509K
代理商: IBM25PPC750CX-CP40-3T
PowerPC 750CX RISC Microprocessor Datasheet
Page 14
Version 1.2
Jun 20, 2001
Table 5 provides the power consumption for the PowerPC 750CX.
5.2
AC Electrical Characteristics
This section provides the AC electrical characteristics for the PowerPC 750CX. After fabrication, parts are sorted by
maximum processor core frequency as shown in the Section 5.2.1 on Page 14, and tested for conformance to the AC
specications for that frequency. The processor core frequency is determined by the bus (SYSCLK) frequency and the
settings of the PLL_CFG(0-3) signals.
5.2.1 Clock AC Specications
Table 6 provides the clock AC timing specications as dened in Figure 2.
Table 5: Power Consumption
See Table 2 on page 12 for recommended operating conditions.
Representative Processor Frequency
Unit
Notes
366MHz
400MHz
466MHz
500MHz
Full-On Mode
Typical ( VDD = 1.8V) (OVDD=1.8)(65C)
3.3
3.5
4.0
4.3
W
1,3,4,5
Maximum ( VDD = 1.9V) (OVDD=1.9)(105C)
6.7
7.1
7.7
8.3
W
1,2,4,5
Typical ( VDD = 1.8V) (OVDD=2.5)(65C)
3.3
3.5
4.0
4.3
W
1,3,4,5
Maximum ( VDD = 1.9V) (OVDD=2.62)(105C)
6.7
7.1
7.7
8.3
W
1,2,4,5
Doze Mode
Maximum ( VDD = 1.9V) (OVDD=1.9)(105C)
3.7
4.0
4.5
4.6
W
1,2,4,5
Nap Mode
Maximum (VDD = 1.9V) (OVDD=1.9)(105C )
1.5
1.6
1.7
W
1,2,4,5
Sleep Mode
Maximum ( VDD = 1.9V) (OVDD=1.9)(105C)
1.4
1.5
1.6
W
1,2,4,5
Note:
1. These values apply for all valid 60X buses. The values do not include I/O Supply Power (OVDD) or PLL/DLL supply power (AVDD). OVDD
power is system dependent, but is typically <10% of VDD power.
2. Maximum power is measured at VDD = 1.90V and assumes worst case process parameters.
3. Typical power is an estimate of the average value measured at VDD =AVDD = 1.8V, OVDD = 1.80/2.5V in a system executing typical applica-
tions and benchmark sequences.
4. Full-on mode uses a worst case instruction mix.
5. Guaranteed by design and characterization, and is not tested.
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