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| 型号： | IBM25PPC750GXEBB2532T |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 800 MHz, RISC PROCESSOR, CBGA292 |
| 封装： | 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292 |
| 文件页数： | 57/74页 |
| 文件大小： | 1054K |
| 代理商： | IBM25PPC750GXEBB2532T |
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Datasheet
IBM PowerPC 750GX RISC Microprocessor
DD1.X
System Design Information
Page 60 of 73
750GX_ds_body.fm SA14-2765-02
September 2, 2005
TRST
Low
Input
JTAG
Enabled high
Internal
enabled
50
a @ 2.5 V
25
a @ 1.8 V
(the pullup current for th
nal resistor)
TS
Low
Input/Output
Address Start
Keeper
5 K
Pullup required to OVDD
TSIZ[0:2]
High
Output
Transfer Attributes
Keeper
TT[0:4]
High
Input/Output
Transfer Attributes
Keeper
VDD
—
Power Supply
WT
Low
Output
Transfer Attributes
Keeper
Table 5-6. Input/Output Usage (Continued)
750GX Signal
Name
Active Level
Input/
Output
Usage Group
Input/Output with
Internal
Pullup Resistors
Level Protect
Required
External
Resistor
Comments
Notes:
1. Depends on the system design. The electrical characteristics of the 750GX do not add additional constraints to the system design, so whatever is do
depend on the system requirements.
2. HRESET, SRESET, and TRST are signals used for RISCWatch to enable proper operation of the debuggers. Logical AND gates should be placed b
and the IBM PowerPC 750GX RISC Microprocessor (see Figure 5-6 on page 61).
3. The 750GX provides protection from meta-stability on inputs through the use of a “keeper” circuit on specific inputs (see Section 5.9 on page 69 for
description).
4. If a system design requires a signal level to be maintained while not being actively driven, an external resistor or device must be used (keepers assu
inputs but do not guarantee a level).
5. The 750GX does not require external pullups on address and data lines. Control lines must be treated individually.
6. Mode Select/Control pins require the proper state at HRESET to configure the operating mode of the processor (see Table 5-10, Summary of Mode
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