参数资料
型号: IBM25PPC750GXEBB2532T
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 800 MHz, RISC PROCESSOR, CBGA292
封装: 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292
文件页数: 7/74页
文件大小: 1054K
代理商: IBM25PPC750GXEBB2532T
Datasheet
IBM PowerPC 750GX RISC Microprocessor
DD1.X
750GX_ds_body.fm SA14-2765-02
September 2, 2005
Electrical and Thermal Characteristics
Page 15 of 73
3. Electrical and Thermal Characteristics
This section provides AC and DC electrical specifications and thermal characteristics for the 750GX.
3.1 DC Electrical Characteristics
The tables in this section describe the DC electrical characteristics for the 750GX.
Table 3-1. Absolute Maximum Ratings 1
Characteristic
Symbol
1.8 V
2.5 V
3.3 V
Unit
Notes
Core supply voltage
VDD
-0.3 to 1.6
V
PLL supply voltage
A1VDD, A2VDD
-0.3 to 1.6
V
60x bus supply voltage
OVDD
-0.3 to 2.0
-0.3 to 2.75
-0.3 to 3.7
V
Input voltage
VIN
-0.3 to 2.0
-0.3 to 2.75
-0.3 to 3.7
V
Storage temperature range
TSTG
-55 to 150
°C
Notes:
1. Functional and tested operating conditions are given in Table 3-2 Recommended Operating Conditions. Absolute maximum rat-
ings are stress ratings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed above may
affect device reliability or cause permanent damage to the device.
2. Caution: Transient VIN overshoots of up to OVDD + 0.8 V, with a maximum of 4.0 V for 3.3 V operation, and undershoots down to
GND - 0.8 V, are allowed for up to 5 ns.
3. Caution: OVDD must not exceed VDD/AVDD by more than 2.5 V continuously. OVDD may exceed VDD/AVDD by up to 2.65 V for up
to 20 ms during power-on or power-off. OVDD must not exceed VDD/AVDD by more than 2.65 V for any amount of time.
4. Caution: VDD/AVDD must not exceed OVDD by more than 1.0 V continuously. VDD/AVDD may exceed OVDD by up to 1.6 V for up
to 20 ms during power-on or power-off. VDD/AVDD must not exceed OVDD by more than 1.6 V for any amount of time.
5. Caution: AVDD must not exceed VDD by more than 0.5 V at any time.
Table 3-2. Recommended Operating Conditions
Characteristic
Symbol
Value
Unit
Notes
Core supply voltage (733 MHz–800 MHz)
VDD
1.4 to 1.5
V
1, 2, 4
Core supply voltage (933 MHz–1.0 GHz)
VDD
1.45 to 1.55
V
1, 2
PLL supply voltage (733 MHz–800 MHz)
AVDD
1.4 to 1.5
V
1, 3, 4
PLL supply voltage (933 MHz–1.0 GHz)
AVDD
1.45 to 1.55
V
1, 3
60× bus supply voltage (1.8 V)
OVDD
1.7 to 1.9
V
60× bus supply voltage (2.5 V)
OVDD
2.375 to 2.625
V
60× bus supply voltage (3.3 V)
OVDD
3.135 to 3.465
V
Input voltage
VIN
GND to OVDD
Die-junction temperature
TJ
-40 to 105
°C
Notes:
1. Lower core voltages are supported to allow slower operation at substantial power savings.
2. These are recommended and tested operating conditions. Proper device operation outside of these conditions is not guaranteed.
3. AVDD should be set to the same value as VDD for single PLL operation.
4. Operation with Vdd up to 1.55V is supported, but the power dissipation will increase.
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