参数资料
| 型号： | ISL62773IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 19/37页 |
| 文件大小： | 0K |
| 描述： | IC PWM REG MULTIPH AMD 48-QFN |
| 标准包装： | 4,000 |
| 系列： | Robust Ripple Regulator™ (R³) |
| 应用： | 控制器，AMD Fusion? SVI 2.0 CPU GPU |
| 输入电压： | 4.5 V ~ 25 V |
| 输出数： | 2 |
| 输出电压： | 0.006 V ~ 1.55 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（6x6） |
| 包装： | 带卷 (TR) |
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ISL62773
Modes of Operation
REP RATE = 10kHz
TABLE 1. CORE VR MODES OF OPERATION
PSL0_L
&
OCP
Threshold
CONFIG.
ISEN3
ISEN2
PSI1_L
MODE
(μA)
3-phase
To Power To Power
11
3-phase CCM
45
Core VR
Config.
Stage
Stage
01
00
2-phase CCM
1-phase DE
2-phase
Tied to 5V To Power
11
2-phase CCM
45
REP RATE = 25kHz
Core VR
Config.
Stage
01
00
1-phase CCM
1-phase DE
1-phase
Core VR
Config.
Tied to 5V Tied to
5V
11
01
00
1-phase CMM
1-phase DE
45
The Core VR can be configured for 3, 2- or 1-phase operation.
Table 1 shows Core VR configurations and operational modes,
programmed by the ISEN3 and ISEN2 pin status and the PSL0_L
and PSL1_L commands via the SVI 2 interface, see Table 9.
For a 2-phase configuration, tie the ISEN3 pin to 5V. In this
configuration, phases 1 and 2 are active. To select a 1-phase
REP RATE = 50kHz
REP RATE = 100kHz
configuration, tie the ISEN3 pin and the ISEN2 pin to 5V. In this
configuration, only phase-1 is active.
In a 3-phase configuration, the Core VR operates in 3-phase CCM,
with PSI0_L and PSI_L both high. If PSI0_L is taken low via the
SVI 2 interface, the Core VR drops phase 3 and continues to
operate in CCM. When both PSI0_L and PSI1_L are taken low,
the Core VR drops phase 2 and enters 1-phase DE mode.
For 2-phase configurations, the Core VR operates in 2-phase CCM
with PSI0_L and PSI_L both high. If PSI0_L is taken low via the
SVI 2 interface, the Core VR drops phase 2 and continues to
operate in 1-phase CCM. When both PSI0_L and PSI1_L are
taken low, the Core VR enters 1-phase DE mode.
In a 1-phase configuration, the Core VR operates in 1-phase CCM
and enters 1-phase DE when both PSI0_L and PSI1_L are low.
The Core VR can be disabled completely by connecting ISEN1 to
+5V.
TABLE 2. NORTHBRIDGE VR MODES OF OPERATION
PSL0_L &
OCP
ISEN2_NB
To Power
CONFIG.
2-phase NB
PSI1_L
11
MODE
2-phase CCM
Threshold
45μA
REP RATE = 200kHz
Stage
VR Config.
01
1-phase CCM
00
1-phase DE
Tied to 5V
1-phase NB
VR Config.
11
01
1-phase CCM
1-phase CCM
45μA
00
1-phase DE
ISL62773 Northbridge VR can be configured for 2- or 1-phase
operation. Table 2 shows the Northbridge VR configurations and
FIGURE 17. CURRENT BALANCING DURING DYNAMIC OPERATION.
CH1: I L1 , CH2: I LOAD , CH3: I L2 , CH4: I L3
19
operational modes, which are programmed by the ISEN2_NB pin
status and the PSI0_L and PSI1_L bits of the SVI 2 command.
March 7, 2012
FN8263.0
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