参数资料
| 型号： | ISL62773IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 29/37页 |
| 文件大小： | 0K |
| 描述： | IC PWM REG MULTIPH AMD 48-QFN |
| 标准包装： | 4,000 |
| 系列： | Robust Ripple Regulator™ (R³) |
| 应用： | 控制器，AMD Fusion? SVI 2.0 CPU GPU |
| 输入电压： | 4.5 V ~ 25 V |
| 输出数： | 2 |
| 输出电压： | 0.006 V ~ 1.55 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（6x6） |
| 包装： | 带卷 (TR) |
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ISL62773
ISUM+
i o
Rntcs
Rp
Cn.1
Cn.2 Vcn
Vo
Rntc
Rn
FIGURE 23. DESIRED LOAD TRANSIENT RESPONSE WAVEFORMS
i o
OPTIONAL
Ri
Rip
Cip
ISUM-
OPTIONAL
FIGURE 27. OPTIONAL CIRCUITS FOR RING-BACK REDUCTION
Vo
FIGURE 24. LOAD TRANSIENT RESPONSE WHEN C n IS TOO SMALL
i o
Vo
FIGURE 25. LOAD TRANSIENT RESPONSE WHEN C n IS TOO LARGE
i o
i L
Vo
RING
BACK
FIGURE 26. OUTPUT VOLTAGE RING-BACK PROBLEM
29
Figure 26 shows the output voltage ring-back problem during
load transient response. The load current i o has a fast step
change, but the inductor current i L cannot accurately follow.
Instead, i L responds in first-order system fashion due to the
nature of the current loop. The ESR and ESL effect of the output
capacitors makes the output voltage V o dip quickly upon load
current change. However, the controller regulates V o according to
the droop current i droop , which is a real-time representation of i L ;
therefore, it pulls V o back to the level dictated by i L , causing the
ring-back problem. This phenomenon is not observed when the
output capacitor has very low ESR and ESL, as is the case with all
ceramic capacitors.
Figure 27 shows two optional circuits for reduction of the
ring-back. C n is the capacitor used to match the inductor time
constant. It usually takes the parallel of two (or more) capacitors
to get the desired value. Figure 27 shows that two capacitors
(C n.1 and C n.2 ) are in parallel. Resistor R n is an optional
component to reduce the V o ring-back. At steady state, C n.1 +
C n.2 provides the desired C n capacitance. At the beginning of i o
change, the effective capacitance is less because R n increases
the impedance of the C n.1 branch. As Figure 24 shows, V o tends
to dip when C n is too small, and this effect reduces the V o
ring-back. This effect is more pronounced when C n.1 is much
larger than C n.2 . It is also more pronounced when R n is bigger.
However, the presence of R n increases the ripple of the V n signal
if C n.2 is too small. It is recommended to keep C n.2 greater than
2200pF. The R n value usually is a few ohms. C n.1 , C n.2 and R n
values should be determined through tuning the load transient
response waveforms on an actual board.
R ip and C ip form an R-C branch in parallel with R i , providing a
lower impedance path than R i at the beginning of i o change. R ip
and C ip do not have any effect at steady state. Through proper
selection of R ip and C ip values, i droop can resemble i o rather than
i L , and V o will not ring back. The recommended value for R ip is
100 ? . C ip should be determined through tuning the load
transient response waveforms on an actual board. The
recommended range for C ip is 100pF~2000pF. However, it
should be noted that the R ip -C ip branch may distort the i droop
waveform. Instead of being triangular as the real inductor
current, i droop may have sharp spikes, which may adversely
affect i droop average value detection and therefore may affect
OCP accuracy. User discretion is advised.
March 7, 2012
FN8263.0
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| ISL6277A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiphase PWM Regulator for AMD Fusion Mobile CPUs Using SVI 2.0 |
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| ISL6277AIRZ | 功能描述:电流型 PWM 控制器 Multi-output Controller for AMD fusion uP, 6X6 QFN RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6277AIRZ-T | 功能描述:电流型 PWM 控制器 Multi-output Controller for AMD fusion uP, 6X6 QFN, T&R RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
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