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| 型号： | ISL6329CRZ |
| 厂商： | Intersil |
| 文件页数： | 13/38页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM SYNC BUCK DL 60QFN |
| 标准包装： | 43 |
| 应用： | 控制器，AMD SVI |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 0.0125 V ~ 1.55 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
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ISL6329
Figure 2 illustrates input currents from a 3-phase converter
combining to reduce the total input ripple current.
The converter depicted in Figure 2 delivers 1.5V to a 36A load from
a 12V input. The RMS input capacitor current is 5.9A. Compare
this to a single-phase converter also stepping down 12V to 1.5V at
36A. The single-phase converter has 11.9A RMS input capacitor
current. The single-phase converter must use an input capacitor
bank with twice the RMS current capacity as the equivalent three-
phase converter.
INPUT-CAPACITOR CURRENT, 10A/DIV
CHANNEL 3
INPUT CURRENT
10A/DIV
CHANNEL 2
INPUT CURRENT
10A/DIV
CHANNEL 1
INPUT CURRENT
10A/DIV
1 μ s/DIV
FIGURE 2. CHANNEL INPUT CURRENTS AND INPUT-CAPACITOR
RMS CURRENT FOR 3-PHASE CONVERTER
state of the PWM signal and turns off the upper MOSFET and
turns on the lower synchronous MOSFET. When the modified
V COMP voltage crosses the modulator ramp, the PWM output
transitions high, turning off the synchronous MOSFET and turning
on the upper MOSFET. The PWM signal will remain high until the
modified V COMP voltage crosses the modulator ramp again.
When this occurs the PWM signal will transition low again.
During each PWM time interval the PWM signal can only
transition high once. Once PWM transitions high it can not
transition high again until the beginning of the next PWM time
interval. This prevents the occurrence of double PWM pulses
occurring during a single period.
To further improve the transient response, ISL6329 also
implements Intersil’s proprietary Adaptive Phase Alignment
(APA) technique, which turns on all phases together under
transient events with large step current. With both APP and APA
control, ISL6329 can achieve excellent transient performance
and reduce the demand on the output capacitors.
Adaptive Phase Alignment (APA)
When a load is applied, the output will fall in direct relation to the
amount of load being applied and the speed at which the load is
being applied. The ISL6329 monitors the output differentially
through the VSEN pin. If the sensed voltage drops quickly by a
user programmable magnitude (V APATRIP ), all of the upper
MOSFETs will immediately be turned on simultaneously. The trip
level is relative, not absolute, and can be programmed through a
resistor and capacitor tied in parallel from the APA pin to ground.
R APA = -----------------------------
V APATRIP
1.75 μ A
(EQ. 4)
capacitor RMS current based on load current, duty cycle, and the
number of channels. They are provided as aids in determining
the optimal input capacitor solution.
Active Pulse Positioning Modulated PWM
Operation
The ISL6329 uses a proprietary Active Pulse Positioning (APP)
modulation scheme to control the internal PWM signals that
command each channel’s driver to turn their upper and lower
MOSFETs on and off. The time interval in which a PWM signal can
occur is generated by an internal clock, whose cycle time is the
inverse of the switching frequency set by the resistor between the
FS pin and ground. The advantage of Intersil’s proprietary Active
Pulse Positioning (APP) modulator is that the PWM signal has
the ability to turn on at any point during this PWM time interval,
and turn off immediately after the PWM signal has transitioned
high. This is important because it allows the controller to quickly
respond to output voltage drops associated with current load
spikes, while avoiding the ring back affects associated with other
modulation schemes.
The PWM output state is driven by the position of the error
amplifier output signal, V COMP , minus the current correction
signal relative to the proprietary modulator ramp waveform as
illustrated in Figure 3. At the beginning of each PWM time
interval, this modified V COMP signal is compared to the internal
modulator waveform. As long as the modified V COMP voltage is
lower then the modulator waveform voltage, the PWM signal is
commanded low. The internal MOSFET driver detects the low
13
A 3900pF, X7R capacitor is required to be placed in parallel to
the APA resistor.
PWM Operation
The timing of each core channel is set by the number of active
channels. Channel detection on the ISEN2-, ISEN3-, ISEN4-,
ISEN5- and ISEN6- pins selects 1-channel to 6-channel operation
for the ISL6329. The switching cycle is defined as the time
between PWM pulse termination signals of each channel. The
cycle time of the pulse signal is the inverse of the switching
frequency set by the resistor between the FS pin and ground (or
VCC). The PWM signals command the MOSFET driver to turn
on/off the channel MOSFETs.
The channel firing order for 6-channel operation is 1-2-3-4-5-6.
For 5-channel operation, the order is 1-2-3-4-5. For 4-channel
operation, the channel firing order is 1-2-3-4. For 3-channel
operation, the channel firing order is 1-2-3.
Connecting ISEN6- to VCC selects five channel operation. To set
four channel operation, both ISEN6- and ISEN5- must be tied to
VCC. Similarly, to set three channel operation, ISEN6-, ISEN5- and
ISEN4- must be tied to VCC. For two channel operation, ISEN6-,
ISEN5-, ISEN4- and ISEN3- must be tied to VCC. To set single
channel operation, ISEN6-, ISEN5- ISEN4- ISEN3- and ISEN2-
must all be tied to VCC. Tying the negative current sense pin of a
channel to VCC while the higher numbered channels are still
active should not be done. For example, tying ISEN4- to VCC
should not be done if ISEN5- and/or ISEN6- are not tied to VCC.
FN7800.0
April 19, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6329CRZ-T | 功能描述:电压模式 PWM 控制器 6+1 PHS DL PWM CONTRLR FOR CORE RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6329EVAL1Z | 制造商:Intersil Corporation 功能描述:ISL6329 EVALUATION BOARD - 60 LEAD - QFN - ROHS COMPLIANT - Bulk |
| ISL6329IRZ | 功能描述:电压模式 PWM 控制器 6+1 PHS DL PWM CONTRLR FOR CORE RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6329IRZ-T | 功能描述:电压模式 PWM 控制器 6+1 PHS DL PWM CONTRLR FOR CORE RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6333ACRZ | 功能描述:IC CTRLR PWM 3PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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