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| 型号： | ISPPAC-POWR1208-01TN44I |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 13/35页 |
| 文件大小： | 0K |
| 描述： | IC ISP POWER MGR ANLG/LOG 44TQFP |
| 标准包装： | 160 |
| 系列： | ispPAC® |
| 应用： | 电源监控器，序列发生器 |
| 输入电压： | 0 V ~ 6 V |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电流 - 电源： | 10mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LQFP |
| 供应商设备封装： | 44-TQFP（10x10） |
| 包装： | 托盘 |
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Lattice Semiconductor
Figure 1-2. Voltage Monitors
Monitor Voltage
Reference
ispPAC-POWR1208 Data Sheet
To PLD Array
VMON1..VMON12
3mV
Hysteresis
Each monitor consists of three major subsystems. The core of the monitor is a voltage comparator. This compara-
tor outputs a HIGH signal to the PLD array if the voltage at its positive terminal is greater than that at its negative
terminal, otherwise it outputs a LOW signal. A small amount of hysteresis is provided by the comparator to reduce
the effects of input noise.
The input signal is attenuated by a programmable resistive divider before it is fed into the comparator. This feature
is used to determine the coarse range in which the comparator should trip (e.g. 1.8V, 3.3V, 5V). Twelve possible
ranges are available from the input divider network. The comparator’s negative terminal is obtained from a pro-
grammable reference source (Reference), which may be set to one of 16 possible values scaled in approximately
1% increments from each other, allowing for ?ne tuning of the voltage monitor’s trip points. This combination of
coarse and ?ne adjustment supports 192 possible trip-point voltages for a given monitor circuit. Because each
monitor’s reference and input divider settings are completely independent of those of the other monitor circuits’, the
user can set any input monitor to any of the 192 available settings.
Comparator Hysteresis
V MON
Range Setting 1
Typical Hysteresis on Typical Hysteresis on
Over Voltage Range Under Voltage Range
Units
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
+/- 16.2
+/- 10.7
+/- 8.1
+/- 5.8
+/- 4.9
+/- 3.9
+/- 14.0
+/- 9.2
+/- 7.0
+/- 5.0
+/- 4.2
+/- 3.4
mV
mV
mV
mV
mV
mV
1. The hysteresis scales depending on the voltage monitor range that is selected. The values shown are typical
and are centered around the nominal voltage trip point for a given range selection.
PLD Architecture
The ispPAC-POWR1208 digital logic is composed of an internal PLD that is programmed to perform the sequenc-
ing functions. The PLD architecture allows ?exibility in designing various state machines and control logic used for
monitoring. The macrocell shown in Figure 1-3 is the heart of the PLD. There are 16 macrocells that can be used to
control the functional states of the sequencer state machine or other control or monitoring logic. The PLD AND
array shown in Figure 1-4 has 36 inputs, and 81 product terms (PTs). The resources from the AND array feed the
16 macrocells. The resources within the macrocells share routing and contain a product-term allocation array. The
1-12
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISPPAC-POWR1208-01TN44I7R | 制造商:Lattice Semiconductor Corporation 功能描述: |
| ISPPAC-POWR1208P1 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Sequencing Controller and Precision Monitor |
| ISPPACPOWR1208P101T44I | 制造商:Lattice Semiconductor Corporation 功能描述: |
| ISPPAC-POWR1208P1-01T44I | 功能描述:监控电路 PROGRAMMABLE PWR SUPPLY CONTR RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| ISPPAC-POWR1208P1-01TN44I | 功能描述:监控电路 PROGRAMMABLE PWR SUPPLY CONTR RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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