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参数资料
| 型号： | ISPPAC-POWR1208-01TN44I |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 17/35页 |
| 文件大小： | 0K |
| 描述： | IC ISP POWER MGR ANLG/LOG 44TQFP |
| 标准包装： | 160 |
| 系列： | ispPAC® |
| 应用： | 电源监控器，序列发生器 |
| 输入电压： | 0 V ~ 6 V |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电流 - 电源： | 10mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LQFP |
| 供应商设备封装： | 44-TQFP（10x10） |
| 包装： | 托盘 |
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Lattice Semiconductor
ispPAC-POWR1208 Data Sheet
16, 32, 64, 128, 256 and 512 (Table 1-3). After the clock for the timers is divided down, it is used to drive the pro-
grammable timers. The four timers share the same timer clock frequency but may have different end count values.
The timers can cover a range from 32us to 524ms for the internal oscillator. Longer delays can be achieved by
using the external clock as an input.
Table 1-3. Timer Values 1
÷ 4
62 kHz
÷ 8
31.2 kHz
÷ 16
15.6 kHz
÷ 32
7.8 kHz
÷ 64
3.9 kHz
÷ 128
2 kHz
÷ 256
1 kHz
÷ 512
0.5 kHz
0.032 ms
0.064 ms
0.064 ms
0.128 ms
0.128 ms
0.128 ms
0.256 ms
0.256 ms
0.256 ms
0.256 ms
0.512 ms
0.512 ms
0.512 ms
0.512 ms
0.512 ms
1.024 ms
1.024 ms
1.024 ms
1.024 ms
1.024 ms
1.024 ms
2.048 ms
2.048ms
2.048ms
2.048ms
2.048ms
2.048ms
2.048ms
4.096 ms
4.096 ms
8.192 ms
4.096 ms
8.192 ms
16.384 ms
4.096 ms
8.192 ms
16.384 ms
4.096 ms
8.192 ms
16.384 ms
4.096 ms
8.192 ms
16.384 ms
4.096 ms
8.192 ms
16.384 ms
4.096 ms
8.192 ms
16.384 ms
32.768 ms
32.768 ms
65.536 ms
32.768 ms
65.536 ms
131.072 ms
32.768 ms
65.536 ms
131.072 ms
32.768 ms
65.536 ms
131.072 ms
262.144 ms
262.144 ms
524.288 ms
1. Timer values based on 250kHz clock.
For design entry, the user can select the source for the clock and the PAC-Designer software will calculate the
appropriate delays in an easy-to-select menu format.
The control inputs for Timer1-Timer4 can be driven by any of the 16 PLD macrocell outputs. The reset for the timers
is a function of the Global Reset pin (RESET), a power-on reset or when the timer gate goes low. The waveforms in
Figure 1-6 show the basic timer start and reset functions. Timer and clock divider values are entered in during the
design phase using PAC-Designer software, simple pull-down menus allow the user to select the clocking mode
and the values for the timers and the PLD clock.
Figure 1-6. Timer Waveforms
Timer Gate
(From PLD)
Timer Output
(To PLD)
Timer Period
Timer Period
Start
Timer
Timer
Expired
Reset
Timer
Start
Timer
Timer
Expired
ProgrammableTimer
Delay
1-16
ProgrammableTimer
Delay
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISPPAC-POWR1208-01TN44I7R | 制造商:Lattice Semiconductor Corporation 功能描述: |
| ISPPAC-POWR1208P1 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Sequencing Controller and Precision Monitor |
| ISPPACPOWR1208P101T44I | 制造商:Lattice Semiconductor Corporation 功能描述: |
| ISPPAC-POWR1208P1-01T44I | 功能描述:监控电路 PROGRAMMABLE PWR SUPPLY CONTR RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| ISPPAC-POWR1208P1-01TN44I | 功能描述:监控电路 PROGRAMMABLE PWR SUPPLY CONTR RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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