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参数资料
| 型号： | ISPPAC-POWR1208-01TN44I |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 29/35页 |
| 文件大小： | 0K |
| 描述： | IC ISP POWER MGR ANLG/LOG 44TQFP |
| 标准包装： | 160 |
| 系列： | ispPAC® |
| 应用： | 电源监控器，序列发生器 |
| 输入电压： | 0 V ~ 6 V |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电流 - 电源： | 10mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LQFP |
| 供应商设备封装： | 44-TQFP（10x10） |
| 包装： | 托盘 |
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Lattice Semiconductor
ispPAC-POWR1208 Data Sheet
Software-Based Design Environment
Design Entry Software
All functions within the ispPAC-POWR1208 are controlled through a Windows-based software development tool
called PAC-Designer. PAC-Designer is an easy-to-use graphical user interface (Figure 1-17) that allows the user to
set up the ispPAC-POWR1208 to perform given functions, such as timed sequences for power supply and monitor
trip points for the voltage monitor inputs. The software tool gives the user control over how the device drives the
outputs and the functional con?gurations for all I/O pins. User-friendly dialog boxes are provided to set and edit all
of the analog features of the ispPAC-POWR1208. An extension to the schematic screen is the LogiBuilder design
environment (Figure 1-18) that is used to enter and edit control sequences. Again, user-friendly dialog boxes are
provided in this window to help the designer to quickly implement sequences that take advantage of the powerful
built-in PLD. Once the con?gurations are chosen and the sequence has been described by the utilities, the device
is ready to program. A standard JTAG interface is used to program the E 2 CMOS memory. PAC-Designer software
supports downloading the device through the PC’s parallel port. The ispPAC-POWR1208 can be reprogrammed
using the software and ispDOWNLOAD ? Cable assembly, to adjust for variations in supply timing, sequencing or
scaling of voltage monitor inputs.
Figure 1-17. PAC-Designer Schematic Screen
The user interface (Figure 1-17) provides access to various internal function blocks within the ispPAC-POWR1208
device.
Analog Inputs : Accesses the programmable threshold trip-points for the comparators and pin naming conven-
tions.
Digital Inputs : Digital input naming con?gurations and digital inputs feed into the internal PLD for the sequence
controller.
Sequence Controller : Incorporates a PLD architecture for designing the state machine to control the order and
functions associated with the user-de?ned power-up sequence/monitor and control.
1-28
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISPPAC-POWR1208-01TN44I7R | 制造商:Lattice Semiconductor Corporation 功能描述: |
| ISPPAC-POWR1208P1 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Sequencing Controller and Precision Monitor |
| ISPPACPOWR1208P101T44I | 制造商:Lattice Semiconductor Corporation 功能描述: |
| ISPPAC-POWR1208P1-01T44I | 功能描述:监控电路 PROGRAMMABLE PWR SUPPLY CONTR RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| ISPPAC-POWR1208P1-01TN44I | 功能描述:监控电路 PROGRAMMABLE PWR SUPPLY CONTR RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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