参数资料
型号: KIT33982CEVBE
厂商: Freescale Semiconductor
文件页数: 12/36页
文件大小: 0K
描述: KIT EVAL 33982 HIGH SIDE SWITCH
标准包装: 1
主要目的: 电源管理,高端驱动器(内部 FET)
嵌入式:
已用 IC / 零件: MC33982
主要属性: 输出电流监控,2 个 SPI 可选电流比
次要属性: 过电流限制SPI控制,开路负载侦测,输出开/关,转换速率
已供物品: 板,CD
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V ? V DD ? 5.5 V, 6.0 V ? V PWR ? 27 V, -40 ? C ? T A ? 125 ? C, unless otherwise noted.
Typical values noted reflect the approximate parameter mean at T A = 25 ? C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER OUTPUT TIMING (CONTINUED)
Over-current Low Detection Blanking Time (OCLT [1:0])
ms
00
01
10
11
t OCL0
t OCL1
t OCL2
t OCL3
108
7.0
0.8
0.08
155
10
1.2
0.15
202
13
1.6
0.25
Over-current High Detection Blanking Time
t OCH
1.0
10
20
? s
CS to CSNS Valid Time
t CNSVAL
10
? s
Output Switching Delay Time (OSD [2:0])
ms
000
001
010
011
100
101
110
111
t OSD0
t OSD1
t OSD2
t OSD3
t OSD4
t OSD5
t OSD6
t OSD7
52
105
157
210
262
315
367
0 . 0
75
150
225
300
375
450
525
95
195
293
390
488
585
683
Watchdog Timeout (WD [1:0])
ms
00
01
10
11
t WDTO0
t WDTO1
t WDTO2
t WDTO3
434
207
1750
875
620
310
2500
1250
806
403
3250
1625
SPI INTERFACE CHARACTERISTICS
Recommended Frequency of SPI Operation
Required Low-state Duration for RST (25)
f SPI
t WRST
50
3.0
167
MHz
ns
Notes
23. Time necessary for the CSNS to be within ±5% of the targeted value.
24. Watchdog timeout delay measured from the rising edge of WAKE to RST from a sleep state condition to output turn-ON with the output
driven OFF and FSI floating. The values shown are for WDR setting of [00]. The accuracy of t WDTO is consistent for all configured
watchdog timeouts.
25.
RST low duration measured with outputs enabled and going to OFF or disabled condition.
33982
Analog Integrated Circuit Device Data ?
12
Freescale Semiconductor
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