参数资料
型号: KIT33982CEVBE
厂商: Freescale Semiconductor
文件页数: 20/36页
文件大小: 0K
描述: KIT EVAL 33982 HIGH SIDE SWITCH
标准包装: 1
主要目的: 电源管理,高端驱动器(内部 FET)
嵌入式:
已用 IC / 零件: MC33982
主要属性: 输出电流监控,2 个 SPI 可选电流比
次要属性: 过电流限制SPI控制,开路负载侦测,输出开/关,转换速率
已供物品: 板,CD
FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSIS FEATURES
FAULT MODE
The 33982 indicates the following faults as they occur by
driving the FS pin to Logic [0]:
? Over-temperature fault
? Over-voltage and under-voltage fault
? Open load fault
? Over-current fault (high and low)
The FS pin will automatically return to Logic [1] when the
fault condition is removed, except for over-current and in
some cases under-voltage.
Fault information is retained in the fault register and is
available (and reset) via the SO pin during the first valid SPI
communication (refer to Table 17 ).
PROTECTION AND DIAGNOSIS FEATURES
OVER-TEMPERATURE FAULT (NON-LATCHING)
The 33982 incorporates over-temperature detection and
shutdown circuitry in the output structure. Over-temperature
detection is enabled when the output is in the ON state.
For the output, an over-temperature fault (OTF) condition
results in the faulted output turning OFF until the temperature
falls below the T SD(HYS) . This cycle will continue indefinitely
until action is taken by the MCU to shut OFF the output, or
until the offending load is removed.
When experiencing this fault, the OTF fault bit will be set
in the status register and cleared after either a valid SPI read
or a power reset of the device.
OVER-VOLTAGE FAULT (NON-LATCHING)
The 33982 shuts down the output during an over-voltage
fault (OVF) condition on the VPWR pin. The output remains
in the OFF state until the over-voltage condition is removed.
When experiencing this fault, the OVF fault bit is set in bit
OD1 and cleared after either a valid SPI read or a power reset
of the device.
The over-voltage protection and diagnostic can be
disabled through the SPI (bit OV_dis).
UNDER-VOLTAGE SHUTDOWN (LATCHING OR
NON-LATCHING)
The output(s) will latch off at some battery voltage below
6.0 V. As long as the V DD level stays within the normal
specified range, the internal logic states within the device will
be sustained.
In the cases where the battery voltage drops below the
under-voltage threshold, (VPWRUV) the output will turn off,
FS will go to Logic [0], and the fault register UVF bit will be set
to 1.
Two cases need to be considered when the battery level
recovers:
? If the output(s) command is (are) low, FS will go to
Logic [1], but the UVF bit will remain set to 1 until the
next read operation.
? If the output command is ON, then FS will remain at
to re-enable the state of output and release FS. The
UVF bit will remain set to 1 until the next read operation.
The under-voltage protection can be disabled through the
SPI (bit UV_dis = 1). In this case, the FS and UVF bits do not
report any under-voltage fault condition and the output state
will not be changed as long as the battery voltage does not
drop any lower than 2.5 V.
OPEN LOAD FAULT (NON-LATCHING)
The 33982 incorporates open load detection circuitry on
the output. Output open load fault (OLF) is detected and
reported as a fault condition when the output is disabled
(OFF). The open load fault is detected and latched into the
status register after the internal gate voltage is pulled low
enough to turn OFF the output. The OLF fault bit is set in the
status register. If the open load fault is removed, the status
register will be cleared after reading the register.
The open load protection can be disabled through the SPI
(bit OL_dis). It is recommended to disable the open load
detection circuitry (OL_dis bit sets to logic [1]) in case of a
permanent open load fault condition.
OVER-CURRENT FAULT (LATCHING)
The 33982 has eight programmable over-current low
detection levels (I OCL ) and two programmable over-current
high detection levels (I OCH ) for maximum device protection.
The two selectable, simultaneously active over-current
detection levels, defined by I OCH and I OCL , are illustrated in
Figure 6 . The eight different over-current low detection levels
(I OCL0 : I OCL7 ) are likewise illustrated in Figure 6 .
If the load current level ever reaches the selected over-
current low detection level and the over-current condition
exceeds the programmed over-current time period (t OC x ), the
device will latch the output OFF.
If at any time the current reaches the selected I OCH level,
then the device will immediately latch the fault and turn OFF
the output, regardless of the selected t OCL driver.
For both cases, the device output will stay off indefinitely
until the device is commanded OFF and then ON again.
Logic [0]. The output must be turned OFF and ON again
33982
Analog Integrated Circuit Device Data ?
20
Freescale Semiconductor
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