参数资料
型号: KIT33982CEVBE
厂商: Freescale Semiconductor
文件页数: 23/36页
文件大小: 0K
描述: KIT EVAL 33982 HIGH SIDE SWITCH
标准包装: 1
主要目的: 电源管理,高端驱动器(内部 FET)
嵌入式:
已用 IC / 零件: MC33982
主要属性: 输出电流监控,2 个 SPI 可选电流比
次要属性: 过电流限制SPI控制,开路负载侦测,输出开/关,转换速率
已供物品: 板,CD
C CS B
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
S
SCLK K
SI S
I
D 7
D 6
D 5
D 2
D 1
D 0
D 7 *
D 6 *
D 5 *
D 2 *
D 1 *
D 0 *
SO O
S
O D 7
O D 6
O D 5
O D 2
O D 1
O D 0
D 7
D 6
D 5
D 2
D 1
D 0
Notes 1. RST is D a 0 , Logic D 2 [1] . . state d during l a the t o above o operation. o r d e r e d e n t r y o f d a t a i n t o t h e S P S S
2. D7:D0 O relate D to 1 , the D most . . . , a recent D ordered s e entry e of f i r s data b into o f the r d device. u l t a n d s t a t u s d a t a o u t o f t h e S P S S
N O T E S : 1 . R S S T T B is in a lo g ic 1 s t a t e d u r in g t h e a b o v e o p e r a t io n .
2 . D 1 , , ., a n D 7 re te th e m s t re c e n t
3 . O D 0 , O D 1 , O D 2 , . . ., a n d O D 7 r e la t e t o t h e fir s t 8 b it s o f o r d e r e d f a u lt a n d s t a t u s d a t a o u t o f t h e d e v ic e .
4 . D 0 , O O 2 , n d O 7 r e p r e n t t h t 8 its o e r e d f a
F G U R E 4 b . M U L T I L E 8 b it O R D P I C O M M U
3. D7*:D0* relate to the previous 8 bits (last command word) of data that was previously shifted into the device.
4. OD7:OD0 relate to the first I 8 bits of ordered fault P and status W data out S of the device. N I C A T I O N
Figure 11. Multiple 8-Bit Word SPI Communication
SERIAL INPUT COMMUNICATION
SPI communication is accomplished using 8-bit
messages. A message is transmitted by the MCU starting
with the MSB, D7, and ending with the LSB, D0 ( Table 9 ).
Table 10 , summarizes the SI registers. The registers are
addressed via D6 : D4 of the incoming SPI word ( Table 9 ).
Table 9. SI Message Bit Assignment
Each incoming command message on the SI pin can be
interpreted using the following bit assignments: the MSB (D7)
is the watchdog bit and in some cases a register address bit;
the next three bits, D6 : D4, are used to select the command
register; and the remaining four bits, D3 : D0, are used to
configure and control the output and its protection features.
Multiple messages can be transmitted in succession to
accommodate those applications where daisy chaining is
desirable or to confirm transmitted data as long as the
messages are all multiples of eight bits. Any attempt made to
latch in a message that is not eight bits will be ignored.
The 33982 has defined registers, which are used to
configure the device and to control the state of the output.
Bit Sig
MSB
LSB
SI Msg Bit
D7
D6 : D4
D3 : D1
D0
Message Bit Description
Watchdog in: toggled to satisfy watchdog
requirements; also used as a register
address bit.
Register address bits.
Used to configure the inputs, outputs, and
the device protection features and SO
status content.
Used to configure the inputs, outputs, and
the device protection features and SO
status content.
33982
Analog Integrated Circuit Device Data ?
Freescale Semiconductor
23
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