参数资料
型号: KMPC8360EZUAJDG
厂商: Freescale Semiconductor
文件页数: 59/95页
文件大小: 0K
描述: IC MPU PWRQUICC II 740-TBGA
标准包装: 2
系列: MPC83xx
处理器类型: 32-位 MPC83xx PowerQUICC II Pro
速度: 533MHz
电压: 1.2V
安装类型: 表面贴装
封装/外壳: 740-LBGA
供应商设备封装: 740-TBGA(37.5x37.5)
包装: 托盘
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
62
Freescale Semiconductor
HDLC, BISYNC, Transparent, and Synchronous UART
19.2
HDLC, BISYNC, Transparent, and Synchronous UART AC Timing
Specifications
Table 61 and Table 62 provide the input and output AC timing specifications for HDLC, BISYNC,
transparent, and synchronous UART protocols.
Table 61. HDLC, BISYNC, and Transparent AC Timing Specifications1
Characteristic
Symbol2
Min
Max
Unit
Outputs—Internal clock delay
tHIKHOV
0
11.2
ns
Outputs—External clock delay
tHEKHOV
1
10.8
ns
Outputs—Internal clock high impedance
tHIKHOX
-0.5
5.5
ns
Outputs—External clock high impedance
tHEKHOX
18
ns
Inputs—Internal clock input setup time
tHIIVKH
8.5
ns
Inputs—External clock input setup time
tHEIVKH
4—
ns
Inputs—Internal clock input hold time
tHIIXKH
1.4
ns
Inputs—External clock input hold time
tHEIXKH
1—
ns
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
are measured at the pin.
2. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tHIKHOX symbolizes the outputs
internal timing (HI) for the time tserial memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
Table 62. Synchronous UART AC Timing Specifications1
Characteristic
Symbol2
Min
Max
Unit
Outputs—Internal clock delay
tUAIKHOV
0
11.3
ns
Outputs—External clock delay
tUAEKHOV
114
ns
Outputs—Internal clock high impedance
tUAIKHOX
011
ns
Outputs—External clock high impedance
tUAEKHOX
114
ns
Inputs—Internal clock input setup time
tUAIIVKH
6—
ns
Inputs—External clock input setup time
tUAEIVKH
8—
ns
Inputs—Internal clock input hold time
tUAIIXKH
1—
ns
Inputs—External clock input hold time
tUAEIXKH
1—
ns
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
are measured at the pin.
2. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tHIKHOX symbolizes the outputs
internal timing (HI) for the time tserial memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
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KMPC8360EZUALFHA 功能描述:微处理器 - MPU 8360 TBGA ENCRP RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
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