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参数资料
型号： M38B79FFFP
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 4.2 MHz, MICROCONTROLLER, PQFP100
封装： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件页数： 23/112页
文件大小： 1862K
代理商： M38B79FFFP
38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
15
Table 6 List of I/O port functions (1)
Pin
P00/FLD8–
P07/FLD15
Nama
Port P0
Input/Output
Output
I/O Format
High-breakdown voltage
P-channel open-drain
output with pull-down
resistor
Low-voltage input level
High-breakdown voltage
P-channel open-drain
output with pull-down
resistor
High-breakdown voltage
P-channel open-drain
output with pull-down
resistor
Low-voltage input level
High-breakdown voltage
P-channel open-drain
output with pull-down
resistor
Low-voltage input level
High-breakdown voltage
P-channel open-drain
output
Low-voltage input level
High-breakdown voltage
P-channel open-drain
output
Low-voltage input level
High-breakdown voltage
P-channel open-drain
output
Low-voltage input level
(port input)
CMOS compatible input
level (RxD, SCLK21,
SCLK22)
CMOS 3-state output
Non-Port Function
FLD automatic display
function
Related SFRs
FLDC mode register
P0 digit output set switch
register
Ref.No.
(1)
(2)
FLDC mode register
FLD automatic display
function
Serial I/O2 function I/O
P10/FLD16–
P17/FLD23
Port P1
Input/output,
individual
bits
FLDC mode register
P2 digit output set switch
register
(1)
P20/FLD0–
P27/FLD7
Port P2
Output
P30/FLD24–
P37/FLD31
Port P3
Input/output,
individual
bits
FLDC mode register
(2)
FLDC mode register
Port P4 FLD/Port switch
register
(2)
P40/FLD32–
P47/FLD39
Port P4
Input/output,
individual
bits
Input/output,
individual
bits
P50/FLD40–
P57/FLD47
Port P5
FLDC mode register
Port P5 FLD/Port switch
register
(2)
FLDC mode register
Port P6 FLD/Port switch
register
(2)
Input/output,
individual
bits
Port P6
P60/FLD48–
P63/FLD51
P64/RxD/
FLD52
P65/TxD/
FLD53,
P66/SCLK21/
FLD54
P67/SRDY2/
SCLK22/
FLD55
P70/INT0,
P71/INT1
P72/INT2
CMOS compatible input
level
CMOS 3-state output
FLDC mode register
Serial I/O2 control
register
UART control register
Interrupt edge selection
register
(3)
(4)
(5)
(6)
Port P7
Input/output,
individual
bits
External interrput input
Interrupt edge selection
register
Interrupt interval determi-
nation control register
Interrupt edge selection
register
FLD output control register
Timer 56 mode register
Timer 12 mode register
Timer 34 mode register
Buzzer output control
register
Interrupt edge selection
register
CPU mode register
(7)
P73/INT3/
DIMOUT
External interrput input
Dimmer signal output
(8)
P74/PWM1
P75/T1OUT
P76/T3OUT
P77/INT4/
BUZ01
CMOS compatible input
level
CMOS 3-state output
PWM output
Timer output
Buzzer output
External interrput input
(9)
Sub-clock generating
circuit I/O
External count input
P80/XCIN
P81/XCOUT
P82/CNTR1
P83/CNTR0/
CNTR2
Port P8
Input/output,
individual
bits
(10)
(11)
(6)
(12)
Interrupt edge selection
register
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