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参数资料
型号： M38B79FFFP
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 4.2 MHz, MICROCONTROLLER, PQFP100
封装： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件页数： 63/112页
文件大小： 1862K
代理商： M38B79FFFP
38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
51
Data Setup
(1) 16-timingordinary mode
The area of addresses 0E7016 to 0EDF16 are used as a FLD au-
tomatic display RAM.
When data is stored in the FLD automatic display RAM, the last
data of FLD port P6 is stored at address 0E7016, the last data of
FLD port P5 is stored at address 0E8016, the last data of FLD port
P4 is stored at address 0E9016, the last data of FLD port P3 is
stored at address 0EA016, the last data of FLD port P1 is stored at
address 0EB016, the last data of FLD port P0 is stored at address
0EC016, and the last data of FLD port P2 is stored at address
0ED016, to assign in sequence from the last data respectively.
The first data of the FLD port P6, P5, P4, P3, P1, P0, and P2 is
stored at an address which adds the value of (the timing number –
1) to the corresponding addresses 0E7016, 0E8016, 0E9016,
0EA016, 0EB016, 0EC016 and 0ED016.
Set the FLD data pointer reload register to the value given by (the
timing number – 1).
Fig. 51 Example of using FLD automatic display RAM in 16-timingordinary mode
(2) 16-timinggradation display mode
Display data setting is performed in the same way as that of the
16-timingordinary mode. Gradation display control data is ar-
ranged at an address resulting from subtracting 007016 from the
display data store address of each timing and pin. Bright display is
performed by setting “0”, and dark display is performed by setting
“1” .
(3) 32-timing Mode
The area of addresses 0E0016 to 0EDF16 is used as a FLD auto-
matic display RAM.
When data is stored in the FLD automatic display RAM, the last
data of FLD port P6 is stored at address 0E0016, the last data of
FLD port P5 is stored at address 0E2016, the last data of FLD port
P4 is stored at address 0E4016, the last data of FLD port P3 is
stored at address 0E6016, the last data of FLD port P1 is stored at
address 0E8016, the last data of FLD port P0 is stored at address
0EA016, and the last data of FLD port P2 is stored at address
0EC016, to assign in sequence from the last data respectively.
The first data of the FLD port P6, P5, P4, P3, P1, P0, and P2 is
stored at an address which adds the value of (the timing number –
1) to the corresponding addresses 0E0016, 0E2016, 0E4016,
0E6016, 0E8016, 0EA016 and 0EC016.
Set the FLD data pointer reload register to the value given by (the
timing number – 1).
Number of timing: 8
(FLD data pointer reload register = 7)
Address
0E8F16
0E7116
0E7216
0E7316
0E7416
0E7516
0E7616
0E7716
0E7816
0E7916
0E7A16
0E7B16
0E7C16
0E7D16
0E7E16
0E7F16
0E8016
0E8116
0E8216
0E8316
0E8416
0E8516
0E8616
0E8716
0E8816
0E8916
0E8A16
0E8B16
0E8C16
0E8D16
0E8E16
0E9016
0E9116
0E9216
0E9316
0E9416
0E9516
0E9616
0E9716
0E9816
0E9916
0E9A16
0E9B16
0E9C16
0E9D16
0E9E16
0E9F16
0EA116
0EA216
0EA316
0EA416
0EA516
0EA616
0EA716
0EA816
0EA916
0EAA16
0EAB16
0EAC16
0EAD16
0EAE16
0EAF16
0EA016
0E7016
The last timing
(The last data of FLDP6)
Timing for start
(The first data of FLDP6)
The last timing
(The last data of FLDP5)
Timing for start
(The first data of FLDP5)
The last timing
(The last data of FLDP4)
Timing for start
(The first data of FLDP4)
The last timing
(The last data of FLDP3)
Timing for start
(The first data of FLDP3)
7
6543
210
Bit
Address
0EB116
0EB216
0EB316
0EB416
0EB516
0EB616
0EB716
0EB816
0EB916
0EBA16
0EBB16
0EBC16
0EBD16
0EBE16
0EBF16
0EB016
The last timing
(The last data of FLDP1)
FLDP1 data area
Timing for start
(The first data of FLDP1)
76
5432
10
Bit
0EC116
0EC216
0EC316
0EC416
0EC516
0EC616
0EC716
0EC816
0EC916
0ECA16
0ECB16
0ECC16
0ECD16
0ECE16
0ECF16
0EC016
0ED116
0ED216
0ED316
0ED416
0ED516
0ED616
0ED716
0ED816
0ED916
0EDA16
0EDB16
0EDC16
0EDD16
0EDE16
0EDF16
0ED016
The last timing
(The last data of FLDP0)
FLDP0 data area
Timing for start
(The first data of FLDP0)
The last timing
(The last data of FLDP2)
FLDP2 data area
Timing for start
(The first data of FLDP2)
FLDP3 data area
FLDP4 data area
FLDP6 data area
FLDP5 data area
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