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参数资料
| 型号： | MAX1541ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/49页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR DIVIDER PWM 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 620kHz |
| 占空比： | 100% |
| 电源电压： | 2 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 是 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
Pin Description
MAX1540A
PIN
MAX1541
NAME
FUNCTION
Overvoltage/Undervoltage Protection and Discharge-Mode Control Input. This four-
level logic input selects between various output fault-protection options (Table 7) by
selectively enabling OVP protection and UVP protection. When enabled, the OVP limit
defaults at 116% of the nominal output voltage, and the UVP limit defaults at 70% of
the nominal output voltage. Discharge mode is enabled when OVP protection is also
1
1
OVP/UVP
enabled. Connect OVP/UVP to the following pins for the desired function:
V CC = enable OVP and discharge mode, enable UVP.
Open = enable OVP and discharge mode, disable UVP.
REF = disable OVP and discharge mode, enable UVP.
GND = disable OVP and discharge mode, disable UVP.
See the Fault Protection and (ON_) sections.
Pulse-Skipping Control Input. This four-level logic input enables or disables the light-
load pulse-skipping operation of each output:
2
2
SKIP
V CC = OUT1 and OUT2 in forced-PWM mode.
Open = OUT1 in forced-PWM mode, OUT2 in pulse-skipping mode.
REF = OUT1 in pulse-skipping mode, OUT2 in forced-PWM mode.
GND = OUT1 and OUT2 in pulse-skipping mode.
Inductor-Saturation Control Input. This four-level logic input sets the inductor-current
saturation limit as a multiple of the valley current-limit threshold set by ILIM, or
disables the function if not required. Connect LSAT to the following pins to set the
saturation current limit:
3
3
LSAT
V CC = 2 x I LIM(VAL)
Open = 1.75 x I LIM(VAL)
REF = 1.5 x I LIM(VAL)
GND = disable LSAT protection
See the Inductor Saturation Limit and Setting the Current Limit sections.
On-Time Selection Control Input. This four-level logic input sets the K-factor value
used to determine the DH_ on-time (see the On-Time One-Shot (TON) section).
Connect to analog ground (GND), REF, or V CC ; or leave TON unconnected to select
4
4
TON
the following nominal switching frequencies:
V CC = 235kHz (OUT1) / 170kHz (OUT2)
Open = 345kHz (OUT1) / 255kHz (OUT2)
REF = 485kHz (OUT1) / 355kHz (OUT2)
GND = 620kHz (OUT1) / 460kHz (OUT2)
Analog Supply Input. Connect to the system supply voltage (+4.5V to +5.5V) through
5
5
V CC
a series 20 Ω resistor. Bypass V CC to analog ground with a 1μF or greater ceramic
capacitor.
Buffered N-Channel MOSFET Gate Input. A logic low on GATE turns off the internal
—
6
GATE
MOSFET so OD appears as high impedance. A logic high on GATE turns on the
internal MOSFET, pulling OD to ground.
Integrator Capacitor Connection for Controller 1. Connect a 47pF to 470pF (47pF typ)
—
7
CC1
capacitor from CC1 to analog ground (GND) to set the integration time constant for
the main MAX1541 controller (OUT1).
16
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