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| 型号： | MAX1541ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 39/49页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR DIVIDER PWM 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 2 |
| 频率 - 最大： | 620kHz |
| 占空比： | 100% |
| 电源电压： | 2 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 是 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
Output-Capacitor Stability Considerations
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
Input-Capacitor Selection
The input capacitor must meet the ripple current
requirement (I RMS ) imposed by the switching currents:
f ESR ≤ SW
lowing equation:
where:
f
π
I RMS =
2
Σ
X=1
I 2OUTX V OUTX (V IN - V OUTX )
V IN
f ESR =
1
2 π R ESR C OUT
For most applications, nontantalum chemistries (ceram-
ic, aluminum, or OS-CON) are preferred due to their
For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Tantalum and OS-CON capacitors in widespread use
at the time of publication have typical ESR zero fre-
quencies of 25kHz. In the design example used for
inductor selection, the ESR needed to support 25mV P-P
ripple is 25mV/1.2A = 20.8m Ω . One 220μF/4V Sanyo
polymer (TPE) capacitor provides 15m Ω (max) ESR.
This results in a zero at 48kHz, well within the bounds
of stability.
Do not put high-value ceramic capacitors directly
across the feedback sense point without taking precau-
tions to ensure stability. Large ceramic capacitors can
have a high-ESR zero frequency and cause erratic,
unstable operation. However, it is easy to add enough
series resistance by placing the capacitors a couple of
inches downstream from the feedback sense point,
which should be as close as possible to the inductor.
Unstable operation manifests itself in two related but
distinctly different ways: double pulsing and fast-feed-
back loop instability. Double pulsing occurs due to
noise on the output or because the ESR is so low that
there is not enough voltage ramp in the output voltage
signal. This “fools” the error comparator into triggering
a new cycle immediately after the 400ns minimum off-
time period has expired. Double pulsing is more annoy-
ing than harmful, resulting in nothing worse than
increased output ripple. However, it can indicate the
possible presence of loop instability due to insufficient
ESR. Loop instability can result in oscillations at the out-
put after line or load steps. Such perturbations are usu-
ally damped, but can cause the output voltage to rise
above or fall below the tolerance limits.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output voltage ripple envelope for over-
shoot and ringing. It can help to monitor simultaneously
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response under/overshoot.
resistance to power-up surge currents typical of sys-
tems with a mechanical switch or connector in series
with the input. If the MAX1540A/MAX1541 are operated
as the second stage of a two-stage power conversion
system, tantalum input capacitors are acceptable. In
either configuration, choose a capacitor that has less
than 10°C temperature rise at the RMS input current for
optimal reliability and lifetime.
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N H ) must be able to dissipate
the resistive losses plus the switching losses at both
V IN(MIN) and V IN(MAX) . Ideally, the losses at V IN(MIN)
should be roughly equal to the losses at V IN(MAX) , with
lower losses in between. If the losses at V IN(MIN) are
significantly higher, consider increasing the size of N H .
Conversely, if the losses at V IN(MAX) are significantly
higher, consider reducing the size of N H . If V IN does
not vary over a wide range, maximum efficiency is
achieved by selecting a high-side MOSFET (N H ) that
has conduction losses equal to the switching losses.
Choose a low-side MOSFET (N L ) that has the lowest pos-
sible on-resistance (R DS(ON) ), comes in a moderate-sized
package (i.e., 8-pin SO, DPAK, or D 2 PAK), and is reason-
ably priced. Ensure that the MAX1540A/MAX1541 DL_
gate driver can supply sufficient current to support the
gate charge and the current injected into the parasitic
drain-to-gate capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems may
occur. Switching losses are not an issue for the low-side
MOSFET since it is a zero-voltage switched device when
used in the step-down topology.
______________________________________________________________________________________
39
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