参数资料
型号: MAX1541ETL+T
厂商: Maxim Integrated Products
文件页数: 37/49页
文件大小: 0K
描述: IC REG CTRLR DIVIDER PWM 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电流模式
输出数: 2
频率 - 最大: 620kHz
占空比: 100%
电源电压: 2 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 40-WFQFN 裸露焊盘
包装: 带卷 (TR)
Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
R ESR ≤
For  high-power  applications  that  do  not  require  high-
accuracy current sensing or inductor-saturation protec-
tion, the MAX1540A/MAX1541 can use the low-side
MOSFET’s on-resistance as the current-sense element
(R SENSE = R DS(ON) ) by connecting CSN_ to the drain
of N L_ and CSP_ to the source of N L_ (Figure 14c). Use
the worst-case maximum value for R DS(ON) from the
MOSFET data sheet, and add some margin for the rise
in R DS(ON) with temperature. A good general rule is to
allow 0.5% additional resistance for each ° C of temper-
ature rise. Inductor-saturation protection must be dis-
abled with this configuration (LSAT = GND) since the
inductor current is only properly sensed when the low-
side MOSFET is turned on.
Alternatively, high-power applications that require
inductor saturation can constantly detect the inductor
For processor-core voltage converters and other appli-
cations where the output is subject to violent load tran-
sients, the output capacitor ’s size depends on how
much ESR is needed to prevent the output from dipping
too low under a load transient. Ignoring the sag due to
finite capacitance:
V STEP
Δ I LOAD(MAX)
In applications without large and fast load transients,
the output capacitor’s size often depends on how much
ESR is needed to maintain an acceptable level of out-
put voltage ripple. The output ripple voltage of a step-
down controller equals the total inductor ripple current
multiplied by the output capacitor’s ESR. Therefore, the
maximum ESR required to meet ripple specifications is:
current by connecting a series RC circuit across the
inductor (Figure 14d) with an equivalent time constant:
R ESR ≤
V RIPPLE
Δ I LOAD(MAX) × LIR
L
R L
= C EQ × R EQ
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
where R L is the inductor’s series DC resistance. In this
configuration, the current-sense resistance is equiva-
lent to the inductor’s DC resistance (R SENSE = R L ). Use
the worst-case inductance and R L values provided by
the inductor manufacturer, adding some margin for the
inductance drop over temperature and load.
In all cases, ensure an acceptable valley current-limit
threshold voltage and inductor-saturation configura-
tions despite inaccuracies in sense-resistance values.
Output Capacitor Selection
The output filter capacitor must have low enough equiv-
alent series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements.
Table 9. Current-Sense Configurations
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, polymers, and other electrolytics).
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent V SAG and V SOAR from
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem (see the V SAG and V SOAR equa-
tions in the Transient Response section). However, low-
capacity filter capacitors typically have high-ESR zeros
that may affect the overall stability (see the Output-
Capacitor Stability Considerations section).
METHOD
a) Output current-sense resistor
CURRENT-SENSE
ACCURACY
High
INDUCTOR-SATURATION
PROTECTION
Allowed
(highest accuracy)
CURRENT-SENSE POWER LOSS
(EFFICIENCY)
R SENSE x I OUT 2
? × R SENSE × I OUT
b) Low-side current-sense resistor
c) Low-side MOSFET on-resistance
d) Equivalent inductor DC resistance
High
Low
Low
Not allowed
(LSAT = GND)
Not allowed
(LSAT = GND)
Allowed
? V OUT ?
?
? 1- V IN ?
No additional loss
No additional loss
2
______________________________________________________________________________________
37
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