参数资料
型号: MAX8550AETI+
厂商: Maxim Integrated Products
文件页数: 16/29页
文件大小: 0K
描述: IC PWR SUP DDR INTEG 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
应用: 控制器,DDR
输入电压: 2 V ~ 28 V
输出数: 2
输出电压: 1.8V,2.5V,0.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 管件
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
Power-OK (POK1)
POK1 is an open-drain output for a window comparator
that continuously monitors V OUT . POK1 is actively held
low when SHDN is low and during the buck regulator
output’s soft-start. After the digital soft-start terminates,
POK1 becomes high impedance as long as the output
voltage is within ±10% of the nominal regulation voltage
set by FB. When V OUT drops 10% below or rises 10%
above the nominal regulation voltage, the MAX8550A
pulls POK1 low. Any fault condition forces POK1 low
until the fault latch is cleared by toggling SHDN or
cycling AV DD power below 1V. For logic-level output
voltages, connect an external pullup resistor between
POK1 and AV DD . A 100k Ω resistor works well in most
applications. Note that the POK1 window detector is
completely independent of the overvoltage- and under-
voltage-protection fault detectors and the state of VTTS
and VTTR.
SHDN and Output Discharge
The SHDN input corresponds to the buck regulator and
places the buck regulator’s portion of the IC in a low-
power mode (see the Electrical Characteristics table).
SHDN is also used to reset a fault signal such as an
overvoltage or undervoltage fault.
When output discharge is enabled, (OVP/UVP = AV DD
or open) and SHDN is pulled low, or if UVP is enabled
(OVP/UVP = AV DD ) and V OUT falls to 70% of its regula-
tion set point, the MAX8550A discharges the buck reg-
ulator output (through the OUT input) through an
internal 10 Ω switch to ground. While the output is dis-
charging, DL is forced low and the PWM controller is
disabled but the reference remains active to provide an
accurate threshold. Once the output voltage drops
below 0.1V, the MAX8550A shuts down the reference
and pulls DL high, effectively clamping the buck output
and LX to ground.
When output discharge is disabled (OVP/UVP = REF or
GND), the controller does not actively discharge the
buck output and the DL driver remains low. Under these
conditions, the buck output discharge rate is determined
by the load current and its output capacitance. The buck
regulator detects and latches the discharge-mode state
set by the OVP/UVP setting on startup.
When OUT is discharging, both VTT and VTTR outputs
will remain alive and continue to track REFIN until OUT
drops to 0.1V.
STBY
The STBY input is an active-low input that is used to
shut down only the VTT output. When STBY is low, VTT
is high impedance.
Power-OK (POK2)
POK2 is the open-drain output for a window compara-
tor that continuously monitors the VTTS input and VTTR
output. POK2 is pulled low when REFIN is less than
0.8V. POK2 is high impedance as long as the output
voltage is within ±10% of the nominal regulation voltage
as set by REFIN. When V VTTS or V VTTR rises 10%
above or 10% below its nominal regulation voltage, the
MAX8550A pulls POK2 low. For logic-level output volt-
ages, connect an external pullup resistor between
POK2 and AV DD . A 100k Ω resistor works well in most
applications.
Current Limit (LDO for VTT
and VTTR Buffer)
The VTT output is a linear regulator that regulates the
input (VTTI) to half the V REFIN voltage. The feedback
point for VTT is at the VTTS input (Figure 1). VTT is
capable of sinking and sourcing at least 1.5A of continu-
ous current and 3A peak current. The current limit for
VTT and VTTR is typically ±5A and ±32mA, respective-
ly. When the current limit for either output is reached,
the outputs regulate the current, not the voltage.
Fault Protection
The MAX8550A provides overvoltage/undervoltage fault
protection in the buck controller. Select OVP/UVP to
enable and disable fault protection as shown in Table 3.
Once activated, the controller continuously monitors the
output for undervoltage and overvoltage fault conditions.
Table 2. Shutdown and Standby Control Logic
SHDN
AV DD *
AV DD **
GND***
STBY
AV DD *
GND**
X
BUCK OUTPUT (V DDQ )
ON
ON
OFF
VTT
ON
OFF (high impedance)
OFF (tracking 1/2 REFIN)
VTTR
ON
ON
OFF (tracking 1/2 REFIN)
* For DDR application, this is referred as S0 state, where all outputs are on.
** For DDR application, this is referred as S3 state, where V DDQ and VTTR are kept on, but VTT is turned off (high impedance).
*** For DDR application, this is referred as S4/S5 states, where all outputs are off. Discharge mode should be selected (OVP/UVP =
AV DD or OPEN, see Table 3) to discharge the outputs.
16
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MAX8550AETI+ 功能描述:电压模式 PWM 控制器 Integrated DDR Power Supply Solution RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel
MAX8550AETI+T 功能描述:电压模式 PWM 控制器 Integrated DDR Power Supply Solution RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel
MAX8550AETI-T 功能描述:PMIC 解决方案 RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel
MAX8550ETI 功能描述:PMIC 解决方案 RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel
MAX8550ETI+ 功能描述:电压模式 PWM 控制器 Integrated DDR Power Supply Solution RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel