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7-6 Chapter 7 8-/16-bit Timer/Counter
MB89190/190A series
Count clock selector 1/2
These are input clock selection circuits. In timer 1 in 8-bit mode or 16-bit mode, three different internal
clocks and one external clock can be selected.
In timer 2 in the 8-bit mode, only three different
internal clocks can be selected.
Counter circuit 1/2
Each of counter circuits 1 and 2 consists of the 8-bit counter, comparator, comparate data latch, and
data registers (T1DR, T2DR). The 8-bit counter increments using the selected count clock. When the
counter value and the comparate data latch value are compared by the comparator and a match is
detected, the counter is cleared and, at the same time, the data register value is set (load) to the
comparate data latch.
In the 8-bit mode, the counter circuit 1/2 operates independently as timer
1/timer 2. In the 16-bit mode, the counter circuits are concatenated and counter circuit 1 operates as
the lower 8 bits and counter circuit 2 operates as the upper 8 bits of a 16-bit counter.
Square wave output control circuit
When a match is detected by the comparator in the 8-bit mode timer 1 or 16-bit mode, an interrupt
request occurs. At this point, when the square wave output is enabled, the output of the TO pin is
reversed by the output control circuit. Also, the square wave output can be initialized to the L or H
level.
Timer1/2 data registers (T1DR, T2DR)
At write, the registers are used to set the data to be compared to the value of each 8-bit counter. At
read, each counter’s current count is read.
Timer1/2 control registers (T1CR, T2CR)
The registers select the function, enable/disable operation, and perform interrupt control and state
checks.
Prescaler 1/2
The operating clock of the resource (original oscillation devided by 2) is divided, and then the divided
clock is supplied to count clock selectors 1 and 2. Prescalers 1 and 2 are cleared to stop when the
corresponding timer starting bits (T1CR: T1STR, and T2CR: T2STR) are 0.
Interrupt by 8-/16-bit timer/counter
IRQ3: The IRQ3 interrupt request occurs when the interrupt request output is enabled (T1CR: T1IE =
1 for 8-bit mode timer 1 or 16-bit mode) when the counter value of timer 1 matches the data
register setting with the interval timer function or the counter function used.
IRQ4: The IRQ4 interrupt request occurs when the interrupt request output is enabled (T2CR: T2IE =
1 for the 8-bit mode timer 2) when the counter value of timer 2 matchs the data register setting
with the internal timer function.