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| 型号： | MC68HC05C5CP |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40 |
| 封装： | DIP-40 |
| 文件页数： | 31/58页 |
| 文件大小： | 166K |
| 代理商： | MC68HC05C5CP |
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Page 31
Section 5: Input/Output Ports
MOTOROLA
MC68HC05C5 Specification Rev. 1.2
SECTION 5
INPUT/OUTPUT PORTS
In single-chip mode there are 32 lines arranged as four 8-bit I/O ports. These ports are
programmable as either inputs or outputs under software control of the data direction
registers.
NOTE:
To avoid a glitch on the output pins, write data to the I/O Port Data
Register before writing a 1 to the corresponding Data Direction Register.
5.1
PORT A
Port A is an 8-bit bidirectional port which does not share any of its pins with other
subsystems. The port A data register is at $0000 and the data direction register (DDR) is
at $0004. Reset does not affect the data registers, but clears the data direction registers,
thereby returning the ports to inputs. Writing a 1 to a DDR bit sets the corresponding port
bit to output mode.
5.2
PORT B
Port B is an 8-bit bidirectional port. Three of the port B pins (PB5 thourgh PB7) are shared
with the SIOP subsystem. Refer to SECTION 7 SIMPLE SERIAL INPUT/OUTPUT PORT
for a detailed description of the SIOP. The port B data register is at $0001 and the data
direction register (DDR) is at $0005. Reset does not affect the data registers, but clears
the data direction registers, thereby returning the ports to inputs. Writing a 1 to a DDR bit
sets the corresponding port bit to output mode.
5.3
PORT C
Port C is an 8-bit bidirectional port which does not share any of its pins with other
subsystems. The port C data register is at $0002 and the data direction register (DDR) is
at $0006. Reset does not affect the data registers, but clears the data direction registers,
thereby returning the ports to inputs. Writing a 1 to a DDR bit sets the corresponding port
bit to output mode. Port C has a high current sink capability. To minimize current spikes,
these pins should be switched one at a time.
5.4
PORT D
Port D is an 8-bit bidirectional port. PD6 is shared with TCMP.
If the PD6 pin is
configured as TCMP by setting the COE bit in the Timer Control Register, this pin will
become an output controlled by the Timer subsection. Refer to SECTION 6 TIMER for
more information. The port D data register is at $0003 and the data direction register
(DDR) is at $0007. Reset does not affect the data registers, but clears the data direction
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