参数资料
型号: ML60851DTB
厂商: LAPIS SEMICONDUCTOR CO LTD
元件分类: 总线控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP44
封装: 10 X 10 MM, 0.80 MM PITCH, PLASTIC, TQFP-44
文件页数: 73/84页
文件大小: 394K
代理商: ML60851DTB
FEDL60851D-01
1Semiconductor
ML60851D
74/83
Data packet transmission and reception procedure during bulk transfer and interrupt transfer modes
The ML60851D is normally used on the peripheral device side. In this method of use, the ML60851D is
connected on one side to the host via the USB bus and is connected on the other side via a parallel interface to the
local microcontroller (local MCU) inside the peripheral device.
The transfer of data is the major function in all types of transfermodes other than the control transfer mode. When
carrying out transfer of data packets between the ML60851D and the host, the following packet communication
is carried out via the USB bus for the data transfer of each packet.
(a) Token packet transfer (IN token or OUT token) from the host to the ML60851D.
(b) Data packet transfer in the desired direction (from the host to the device or from the device to the host).
(c) Transfer of handshake packet in a direction opposite to that of the data packet.
When packet transfer is completed normally, an ACK packet is returned in step (c) and the operation
proceeds to the next packet transfer.
The ML60851D requests the local MCU to transmit or receive a packet of data by asserting the
INTR pin.
The interrupt cause will be “packet ready”. The transmit packet ready interrupt is one that requests that the
packet of data to be transmitted be written in the transmit FIFO, and the receive packet ready interrupt is one
that requests the local MCU to read out the data that has been received and stored in the receive FIFO.
The above procedures of transferring one packet of data are explained below for transmission and reception
separately.
1) During transmission
The local MCU writes one packet of data that has to be transmitted in the transmit FIFO of the corresponding
EP in the ML60851D, and sets the transmit packet ready bit of the corresponding EP status register of the
ML60851D. When the host transmits the IN token packet to the ML60851D specifying the communication
method, etc., the ML60851D transmits to the host the data packet stored in the above transmit FIFO. When
the host receives one data packet normally, it returns the ACK packet to the ML60851D. Consequently, the
ML60851D resets the transmit packet ready status, thereby completing the transfer of one data packet over
the USB bus. When the transmit packet ready status is reset, the ML60851D gives a request to the local
MCU in terms of a transmit packet ready interrupt thereby prompting the local MCU to write the next packet
of data to be transmitted.
2) During reception
The host sends to the ML60851D an OUT token followed by a data packet. The ML60851D stores the
received data packet in the receive FIFO of the corresponding EP. When it is confirmed that all the data
packets have been accumulated and that there is no error, the ML60851D returns an ACK packet to the host.
At the same time, the receive packet ready bit of the corresponding EP status register will also be set and a
request is sent to the local MCU in terms of an interrupt. Upon receiving this interrupt, the local MCU reads
out the received data from the ML60851D and resets the receive packet ready bit.
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