- 您现在的位置：买卖IC网 > PDF目录69035 > MM908E630CVFC (FREESCALE SEMICONDUCTOR INC) MICROCONTROLLER, QCC44 PDF资料下载
参数资料
| 型号： | MM908E630CVFC |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROCONTROLLER, QCC44 |
| 封装： | 9 X 9 MM, 1 MM HEIGHT, 0.65 MM PITCH, ROHS COMPLIANT, QFN-44 |
| 文件页数： | 35/48页 |
| 文件大小： | 2299K |
| 代理商： | MM908E630CVFC |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页当前第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页
Analog Integrated Circuit Device Data
40
Freescale Semiconductor
908E630
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Interrupt Mask Register - IMR
This register allow to mask some of interrupt sources. The
respective flags within the Interrupt Source Register (ISR) will
continue to work, but will not generate interrupts to the MCU.
The 5.0 V Regulator over-temperature prewarning interrupt
and under-voltage (VSUV) interrupts can not be masked and
will always cause an interrupt.
Writing to the Interrupt Mask Register IMR will return the
Interrupt Source Register ISR.
HSM - High Side Interrupt Mask
This write-only bit enables/disables interrupts generated in
the High Side block.
1 = HS Interrupts Enabled
0 = HS Interrupts Disabled
LSM - Low Side Interrupt Mask
This write-only bit enables/disables interrupts generated in
the Low Side block.
1 = LS Interrupts Enabled
0 = LS Interrupts Disabled
LINM - LIN Interrupts Mask
This write-only bit enables/disables interrupts generated in
the LIN block.
1 = LIN Interrupts Enabled
0 = LIN Interrupts Disabled
VMM - Voltage Monitor Interrupt Mask
This write-only bit enables/disables interrupts generated in
the Voltage Monitor block. The only maskable interrupt in the
Voltage Monitor Block is the VSUP over-voltage interrupt.
1 = Interrupts Enabled
0 = Interrupts Disabled
Interrupt Source Register - ISR
This register allows the MCU to determine the source of
the last interrupt or wake-up respectively. A read of the
register acknowledges the interrupt and leads IRQ_A pin to
high, in case there are no other pending interrupts. If there
are pending interrupts, IRQ_A will be driven high for 10 s
and then be driven low again.
This register is also returned when writing to the Interrupt
Mask Register IMR.
ISRx - Interrupt Source Register
These read-only bits indicate the interrupt source following
Table 31. If no interrupt is pending than all bits are 0.
In case more than one interrupt is pending, than the
interrupt sources are handled sequentially multiplex.
Table 31. Interrupt Sources
Table 29. Interrupt Mask Register - $E
C3
C2
C1
C0
Write
HSM
LSM
LINM
VMM
Reset
Value
1
111
Reset
Condition
POR
Table 30. Interrupt Source Register - $E/$F
S3
S2
S1
S0
Read
ISR3
ISR2
ISR1
ISR0
Interrupt Source
Priority
ISR3 ISR2 ISR1 ISR0
none maskable
maskable
0
no interrupt
none
0
1
Lx Wake-up from Stop mode
highest
0
1
0
-
HS Interrupt (Over-temperature)
0
1
-
LS Interrupt (Over-temperature)
0
1
0
LIN Wake-up
LIN Interrupt (RXSHORT, TXDOM or LIN OT)
0
1
0
1
Voltage Monitor Interrupt
(Low Voltage and VDD over-
temperature)
Voltage Monitor Interrupt
(High Voltage)
0
1
0
Forced Wake-up
lowest
相关PDF资料 |
PDF描述 |
|---|---|
| MN101CP66DBF | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP84 |
| MN101CF66DBF | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP84 |
| MN101CF66DAL | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP80 |
| MN101CP66DAL | 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PQFP80 |
| MN103SA7D | 32-BIT, MROM, MICROCONTROLLER, PQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MM-90N | 功能描述:ANT MAGN MNT VEHIC 3.5"DIA 10'NF RoHS:是 类别:RF/IF 和 RFID >> RF 天线 系列:* 标准包装:1 系列:* |
| MM90R9F | 制造商:Ohmite Mfg Co 功能描述: |
| MM912_634 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Integrated S12 Based Relay Driver with LIN |
| MM912_634_12 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Integrated S12 Based Relay Driver with LIN |
| MM912_637 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Xtrinsic Battery Sensor with LIN for 12 V Lead-acid |
发布紧急采购，3分钟左右您将得到回复。