参数资料
型号: MPM22CGA800A
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 800 MHz, MICROPROCESSOR, XMA
封装: MMC-2
文件页数: 47/68页
文件大小: 966K
代理商: MPM22CGA800A
Pentium
III Processor Mobile Module MMC-2
Featuring Intel
SpeedStep Technology
243356-006
Datasheet
45
If selected for I(R20), 100
A would be adequate for the reference and current source base drive.
Since both of these currents must be satisfied at the low power supply margin, a V_DC of 7.5V will
be assumed.
Equation 10.
R20 = (V_DC-Vref)/I(R20) = 7.5-2.50)/100.0
A= 50.0 k
(To allow for component tolerances, 51.0 k
is recommended.)
5.3.4.5
Slew Rate Control
The slew rate control regulates the rate that the power supply voltage is applied to the system.
Let the Threshold voltage of M1, Vt = -1.0V
Let M1 VGS(sat) = -2.4V, also denoted as Vsat
Let R16 = 100.0 k
Let t_delay = 500.0
S
Let Ctotal = the sum or the Bulk capacitors + the sum of the module capacitors = 5 X 22.0 F +
2 X 4.7
F= 119.4 F
M1 is a low RDS(on) P-Channel MOSFET such as the Siliconix* Si4435DY. When the power
supply voltage is applied and increased to a value that exceeds the Lockout value, (7.5V will be
used in this example), the Undervoltage Lockout circuit, allows R4 to pull up the gate of M3 to
start a turn-on sequence. M3 pulls its drain toward ground, forcing current to flow through R2. M1
will not start to source any current until after t_delay, with t_delay defined as shown in Equation 11
and Equation 12 below.
Equation 11.
Equation 12.
The published minimum threshold of the Si4435DY is a VGS of -1.0V, i.e. C9 must charge to 1.0V
before M1 starts to turn on. The delay, t_delay, is the time required to charge C9 to 1.0V.
Assuming a negligible voltage drop across M3, when M3 is on, the voltage on the Gate of M1, VG,
with respect to ground, is the voltage developed across R2: VG
≡ V
(R2). If a minimum steady-state
bias on M1 is desired to be -4.5V, this will be the voltage dropped across R16. At the low end of the
V_DC margin, i.e. 7.5V, then VG can be derived from Equation 13 below.
Equation 13.
VG = V_DC+VGS = 7.5V- 4.5V = 3.0V (with respect to ground)
t_delay
R2 C9
.
ln 1
Vt
V_DC
Vg
.
Vgs
R16
R2
V_DC
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