参数资料
型号: MT46H128M32LFCM-5AT:A
元件分类: DRAM
英文描述: 128M X 32 DDR DRAM, 5 ns, PBGA90
封装: 10 X 13 MM, GREEN, PLASTIC, VFBGA-90
文件页数: 95/106页
文件大小: 3431K
Figure 50: WRITE-to-PRECHARGE – Uninterrupting
CK
CK#
Command1
WRITE2,4
NOP
Address
Bank a,
Col b
Bank
(a or all)
NOP
T0
T1
T2
T3
T2n
T4
T5
T1n
T6
DQ6
DQS
DM
DQ6
DQS
DM
DQ6
DQS
DM
Don’t Care
Transitioning Data
tWR5
PRE3,4
tDQSS (NOM)
tDQSS (MIN)
tDQSS (MAX)
tDQSS
DIN
b
DIN
b+1
DIN
b+2
DIN
b+3
DIN
b
DIN
b+1
DIN
b+2
DIN
b+3
DIN
b
DIN
b+1
DIN
b+2
DIN
b+3
Notes: 1. An uninterrupted burst 4 of is shown.
2. A10 is LOW with the WRITE command (auto precharge is disabled).
3. PRE = PRECHARGE.
4. The PRECHARGE and WRITE commands are to the same device. However, the PRE-
CHARGE and WRITE commands can be to different devices; in this case, tWR is not
required and the PRECHARGE command can be applied earlier.
5. tWR is referenced from the first positive CK edge after the last data-in pair.
6. DINb = data-in for column b.
2Gb: x16, x32 Mobile LPDDR SDRAM
WRITE Operation
PDF: 09005aef83a73286
2gb_ddr_mobile_sdram_t69m.pdf - Rev. M 11/10 EN
89
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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