参数资料
型号: MT46V2M32V1
厂商: Micron Technology, Inc.
英文描述: DOUBLE DATA RATE DDR SDRAM
中文描述: 双倍数据速率的DDR SDRAM内存
文件页数: 64/65页
文件大小: 2360K
代理商: MT46V2M32V1
64
64Mb: x32 DDR SDRAM
2M32DDR-07.p65
Rev. 12/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
64Mb: x32
DDR SDRAM
WRITE
DM OPERATION
TIMING PARAMETERS
-5
-6
-65
SYMBOL
t
CH
t
CL
t
CK (3)
t
CK (2)
t
DH
t
DS
t
DQSH
t
DQSL
t
DQSS
t
DSS
MIN
0.45
0.45
5
8
0.6
0.6
0.4
0.4
0.75
0.25
MAX
0.55
0.55
12
12
MIN
0.45
0.45
6
9
0.6
0.6
0.4
0.4
0.75
0.25
MAX
0.55
0.55
12
12
MIN
0.45
0.45
6.5
10
0.6
0.6
0.4
0.4
0.75
0.25
MAX
0.55
0.55
12
12
UNITS
t
CK
t
CK
ns
ns
ns
ns
t
CK
t
CK
t
CK
t
CK
1.25
1.25
1.25
-5
-6
-65
SYMBOL
t
DSH
t
IH
t
IS
t
RAS
t
RCD
t
RP
t
WPRE
t
WPRES
t
WPST
t
WR
MIN
0.25
1
1
40
20
20
0.25
0
0.4
2
MAX
MIN
0.25
1
1
40
18
18
0.25
0
0.4
2
MAX
MIN
0.25
1
1
40
19.5
19.5
0.25
0
0.4
2
MAX
UNITS
t
CK
ns
ns
ns
ns
ns
t
CK
ns
t
CK
t
CK
120,000
120,000
120,000
0.6
0.6
0.6
CK
CK#
CKE
A8
BA0, BA1
t
CK
t
CH
t
CL
t
IS
t
IS
t
IH
t
IS
t
IS
t
IH
t
IH
t
IH
t
IS
t
IH
RA
t
RCD
t
RAS
t
DSH
7
tRP
tWR
T0
T1
T2
T3
T4
T5
T5n
T6
T7
T8
T4n
NOTE:
1. DI
n
= data-out from column
n
; subsequent elements are provided in the programmed order.
2. Burst length = 4 in the case shown.
3. Disable auto precharge.
4.
Don
t Care
if A8 is HIGH at T8.
5. PRE = PRECHARGE, ACT = ACTIVE, RA = Row Address, BA = Bank Address.
6. NOP commands are shown for ease of illustration; other commands may be valid at these times.
7
.tDSH is applicable during tDQSS (MIN)
and is referenced from CK T4 or T5.
8
.tDSS is applicable during tDQSS (MAX)
and is referenced from CK T5 or T6.
NOP6
NOP6
COMMAND
5
3
ACT
RA
RA
Col
n
WRITE2
NOP6
ONE BANK
ALL BANKS
Bank
x
PRE
Bank
x
NOP6
NOP6
NOP6
t
DQSL
t
DQSH
t
WPST
t
DSS
8
t
DSH
7
t
DSS
8
Bank
x
4
DQ
1
DQS
DM
DI
b
t
DS
t
DH
DON
T CARE
TRANSITIONING DATA
t
DQSS (NOM)
A0-A7
A9, A10
t
WPRES
t
WPRE
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