参数资料
型号: MT49H8M32FM
厂商: Micron Technology, Inc.
英文描述: REDUCED LATENCY DRAM RLDRAM
中文描述: 低延迟DRAM延迟DRAM
文件页数: 3/43页
文件大小: 652K
代理商: MT49H8M32FM
3
256: x16, x32 RLDRAM
MT49H8M32_3.p65 – Rev. 3, Pub. 6/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
ADVANCE
256Mb: x16, x32
2.5V V
EXT
, 1.8V V
DD
, 1.8V V
DD
Q, RLDRAM
NOTE:
1. When the BL4 setting is used, A19 is a “Don’t Care.”
2. In the 16 Meg x 16 configuration, only DQS[1:0] and DQS#[1:0] are used.
FUNCTIONAL BLOCK DIAGRAM
16 Meg x 16
A0–A19, B0, B1, B2
Column Address
Buffer
Column Address
Counter
Refresh
Counter
Row Decoder
Memory Array
Bank 1
C
S
Row Address
Buffer
Row Decoder
Memory Array
Bank 0
C
S
Row Decoder
Memory Array
Bank 2
C
S
Row Decoder
Memory Array
Bank 3
C
S
Row Decoder
Memory Array
Bank 5
C
S
Row Decoder
Memory Array
Bank 4
C
S
Row Decoder
Memory Array
Bank 6
C
S
Row Decoder
Memory Array
Bank 7
C
C
C
A
W
C
R
D
D
V
R
S
Data Valid
DVLD
Data Read Strobe
DQS[1:0], DQS#[1:0]
Input Buffers
Output Buffers
Control Logic and Timing Generator
DQ0–DQ15
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