参数资料
| 型号： | NCP5318FTR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 28/32页 |
| 文件大小： | 0K |
| 描述： | IC CTLR CPU 2/3/4 PHASE 32-LQFP |
| 产品变化通告： | Product Obsolescence 08/Apr/2011 |
| 标准包装： | 1 |
| 应用： | 控制器，CPU |
| 输入电压： | 9.5 V ~ 13.2 V |
| 输出数： | 4 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5318FTR2GOSCT |
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NCP5318
RDRP RSENSE (eq. 30)
RFB
RLL
Resistor R FB is connected between V OUT and the V FB pin
of the controller. At no load, this resistor will conduct the
very small internal bias current of the V FB pin. Therefore
R FB should be kept below 10 k W to avoid output voltage
error due to the input bias current. If the R FB resistor is kept
small, the V FB bias current can be ignored.
Resistor R DRP is connected between the V DRP and V FB
pins of the controller. At no load, V DRP , V FB and V OUT are
at the same potential, and no current should flow through
R DRP or R FB . As load current increases, the voltage at the
V DRP pin rises. The the R DRP and R FB resistors cause the
voltage at V OUT to fall in order to keep the voltage at the V FB
pin close to the reference voltage. Figure 30 shows the
DC effect of AVP.
To choose components, select the appropriate resistor
ratio based on the desired loadline and sense resistor. At no
load, the output voltage is positioned 19 mV below the DAC
output setting. The output voltage droop will follow the
equation:
+ g
where:
g = gain of the current sense amplifiers (V/V);
R SENSE = resistance of the sense element (m W );
R LL = load line resistance (m W ).
It is easiest to select a value for R FB and then evaluate the
equation to find R DRP . R LL is simply the desired output
voltage droop divided by the output current. If a sense
0
? 0.02
? 0.04
Spec Max
V OUT ? VID
resistor is used to detect inductor current, then R SENSE will
be the value of the sense resistor. If inductor sensing is used,
R SENSE will be the resistance of the inductor. Refer to the
discussion on Current Sensing for further information.
Depending on inductor ESR and the loadline desired,
? 0.06
? 0.08
? 0.10
? 0.12
Spec Min
adding a capacitor on the order of 1 nF in parallel with R DRP
may improve the transient output voltage waveshape.
? 0.14
0
10
20
30
40
50
60
I OUT (A)
Figure 30. The DC Effects of AVP vs. Load
LOAD CURRENT, 60 A/DIV
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE, 50 mV/DIV
OUTPUT VOLTAGE, 50 mV/DIV
VDRP VOLTAGE, 200 mV/DIV
5 m S/DIV
Figure 31. Output Voltage ? No Capacitor
in Parallel with R DRP
http://onsemi.com
28
VDRP VOLTAGE, 200 mV/DIV
5 m S/DIV
Figure 32. Output Voltage – 1.2 nF Capacitor
in Parallel with R DRP
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