参数资料
| 型号： | NCP5318FTR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/32页 |
| 文件大小： | 0K |
| 描述： | IC CTLR CPU 2/3/4 PHASE 32-LQFP |
| 产品变化通告： | Product Obsolescence 08/Apr/2011 |
| 标准包装： | 1 |
| 应用： | 控制器，CPU |
| 输入电压： | 9.5 V ~ 13.2 V |
| 输出数： | 4 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5318FTR2GOSCT |
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NCP5318
ELECTRICAL CHARACTERISTICS (continued) (0 ° C < T A < 70 ° C; V CC = 12 V; C GATEx = 100 pF, C COMP = 0.01 m F,
C SS = 0.1 m F, C VCC = 0.1 m F, R ROSC = 95.3 k W , V(I LIM ) = 1.0 V, DAC Code 010100; unless otherwise noted)
Characteristic
Test Conditions
Min
Typ
Max
Unit
MOSFET Driver Enable (DRVON)
Source Current
DRVON = 1.5 V
0.5
3.0
6.5
mA
GATES
High Voltage
Low Voltage
Rise Time GATE
Fall Time GATE
Measure GATEx, I GATEx = 1.0 mA
Measure GATEx, I GATEx = 1.0 mA
0.8 V < GATEx < 2.0 V, V CC = 10 V
2.0 V > GATEx > 0.8 V, V CC = 10 V
2.25
?
?
?
?
0.1
5.0
5.0
?
0.7
10
10
V
V
ns
ns
Oscillator
Switching Frequency
R OSC Voltage
Phase Delay, 3 Phases
Phase Delay, 4 Phases
Phase Disable Threshold
R OSC = 95.3 k, 3 Phase
R OSC = 95.3 k, 4 Phase
?
V CC = CS4P = CS4N
?
V CC ? (CS4P = CS4N)
276
213
0.95
100
75
500
325
251
1.02
120
90
?
374
289
1.05
140
105
?
kHz
V
deg
deg
mV
Adaptive Voltage Positioning
V DRP Output Voltage to DAC OUT Offset
Current Sense Amplifier to V DRP Gain
(each channel separately)
V DRP Source Current
V DRP Sink Current
CSxP = CSxN, V FB = COMP,
Measure V DRP ? COMP
CSxP ? CSxN = 80 mV, V FB = COMP, Mea-
sure V DRP ? COMP for 25 ° C < T A < 70 ° C
?
?
? 20
4.37
0.95
0.2
0
4.6
1.3
0.4
+20
4.83
3.0
0.6
mV
V/V
mA
mA
Soft ? Start
Charge Current
Discharge Current
COMP Pull ? Down Current
?
?
?
30
90
0.2
44
120
0.9
50
160
2.1
m A
m A
mA
Current Sensing and Overcurrent Protection
CSxP Input Bias Current
CSxN Input Bias Current
Current Sense Amp to PWM Gain
Current Sense Amp to PWM Bandwidth
Current Sense Amp to I LIM Gain
Current Sense Amp to I LIM Bandwidth
Current Limit Filter Slew Rate
I LIM Input Bias Current
Current Sense Amp to I LIM Output Offset
Current Sense Common Mode Input Range
CSxN = CSxP = 0 V
CSxN = CSxP = 0 V
CSxN = 0 V, CSxP = 80 mV, Measure
V(COMP) when GATEx switches high
(Note 2)
CSxP ? CSxN = 20 mV to 60 mV, Ramp
I LIM until SS goes low
(Note 2)
(Note 2)
I LIM = 0 V
T = 80 ° C
(Note 2)
?
?
3.4
?
3.228
?
2.0
?
? 82
0
0.1
0.1
4.6
7.0
3.390
1.0
5.0
0.1
? 12
?
1.0
1.0
5.8
?
3.526
?
13
1.0
58
2.0
m A
m A
V/V
MHz
V/V
MHz
mV/ m s
m A
mV
V
General Electrical Specifications
V CC Operating Current
UVLO Start Threshold
UVLO Stop Threshold
UVLO Hysteresis
COMP = 0.3 V (no switching)
SS charging, GATEx switching
GATEx not switching, SS and COMP
discharging
Start ? Stop
?
8.5
7.5
0.8
27
9.0
8.0
1.0
35
9.5
8.5
1.2
mA
V
V
V
2. Guaranteed by design, not tested in production.
http://onsemi.com
8
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