参数资料
| 型号： | NCP5318FTR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 29/32页 |
| 文件大小： | 0K |
| 描述： | IC CTLR CPU 2/3/4 PHASE 32-LQFP |
| 产品变化通告： | Product Obsolescence 08/Apr/2011 |
| 标准包装： | 1 |
| 应用： | 控制器，CPU |
| 输入电压： | 9.5 V ~ 13.2 V |
| 输出数： | 4 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5318FTR2GOSCT |
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NCP5318
9. Current Sensing
Current sensing is used to balance current between
different phases, to limit the maximum phase current and to
limit the maximum system current. Since the current
information is a part of the control loop, better stability is
achieved if the current information is accurate and
noise ? free. The NCP5318 uses differential current sense
amplifiers to achieve the best possible performance.
Two sense lines are routed for each phase, as shown in
Figure 29.
For inductive current sensing, choose the current sense
network (R CSx , C CSx , x = 1, 2, 3 or 4) to satisfy
where R L is the inductor ESR. This will provide an adequate
starting point for R CSx and C CSx . After the converter is
constructed, the value of R CSx (and/or C CSx ) should be
fine ? tuned in the lab by observing the V DRP signal during a
step change in load current. Tune the R CSx x C CSx network
by varying R CSx to provide a “square ? wave” at the V DRP
output pin with maximum rise time and minimal overshoot
as shown in Figure 35.
For resistive current sensing, choose the current sense
network (R CSx , C CSx , x = 1, 2, 3, or 4) to reject noise spikes,
but maintain the fidelity of the triangular current waveform.
CCSx + Lo
RCSx
RL
(eq. 31)
LOAD CURRENT, 60 A/DIV
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE,
50 mV/DIV
OUTPUT VOLTAGE, 50 mV/DIV
VDRP VOLTAGE,
200 mV/DIV
200 m S/DIV
Figure 33. V DRP tuning waveforms. The RC time
constant of the current sense network is too long
(Slow): V DRP and V OUT respond too slowly.
VDRP VOLTAGE,
500 mV/DIV
200 m S/DIV
Figure 34. V DRP tuning waveforms. The RC time
constant of the current sense network is too short
(Fast): V DRP and V OUT both overshoot.
LOAD CURRENT, 60 A/DIV
OUTPUT VOLTAGE,
50 mV/DIV
VDRP VOLTAGE,
200 mV/DIV
200 m S/DIV
Figure 35. V DRP tuning waveforms. The RC time
constant of the current sense network is optimal:
V DRP and V OUT respond to the load current quickly
without overshooting.
http://onsemi.com
29
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