参数资料
| 型号： | NCP5331FTR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 25/36页 |
| 文件大小： | 0K |
| 描述： | IC CTLR PWM 2PH W/DRVRS 32-LQFP |
| 产品变化通告： | Product Obsolescence 05/Oct/2010 |
| 标准包装： | 1 |
| 应用： | 控制器，AMD Athlon? |
| 输入电压： | 9 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5331FTR2GOSCT |
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NCP5331
For increasing current
D tINC + Lo @ D IO (VIN * VCORE)
(3.1)
ILo,MAX + IO,MAX 2 ) D ILo 2
(8)
For decreasing current
I C,MAX
D I C,IN = I C,MAX ? I C,MIN
D tDEC + Lo @ D IO (VCORE)
(3.2)
I C,MIN
For typical processor applications with output voltages
less than half the input voltage, the current will be increased
much more quickly than it can be decreased. It may be more
difficult for the converter to stay within the regulation limits
when the load is removed than when it is applied ? excessive
overshoot may result.
The output voltage ripple can be calculated using the
0A
?I IN,AVG
t ON
FET Off,
Caps Charging
FET On,
Caps Discharging
T/2
output inductor value derived in this Section (Lo MIN ), the
number of output capacitors (N OUT,MIN ) and the per
capacitor ESR determined in the previous Section.
Figure 30. Input Capacitor Current for a
Two?Phase Converter
VOUT,P?P + (ESR per cap NOUT,MIN) @
(VIN * #Phases @ VCORE) @ D (LoMIN @ fSW)
(4)
I Lo,MIN is the minimum output inductor current.
ILo,MIN + IO,MAX 2 * D ILo 2
D ILo + (VIN * VCORE) @ D (Lo @ fSW)
This formula assumes steady?state conditions with no
more than one phase on at any time. The second term in
Equation 4 is the total ripple current seen by the output
capacitors. The total output ripple current is the “time
summation” of the two individual phase currents that are
180 degrees out?of?phase. As the inductor current in one
phase ramps upward, current in the other phase ramps
(9)
D I Lo is the peak?to?peak ripple current in the output
inductor of value L o .
(10)
For the two?phase converter, the input capacitor(s) rms
current is then
downward and provides a canceling of currents during part
of the switching cycle. Therefore, the total output ripple
ICIN,RMS + [2D @ (IC,MIN2 ) IC,MIN @ D IC,IN
(11)
NIN + ICIN,RMS IRMS,RATED
current and voltage are reduced in a multiphase converter.
3. Input Capacitor Selection
The choice and number of input capacitors is primarily
determined by their voltage and ripple current ratings. The
designer must choose capacitors that will support the worst
case input voltage with adequate margin. To calculate the
number of input capacitors one must first determine the total
rms input ripple current. To this end, begin by calculating the
average input current to the converter.
) D IC,IN2 3) ) IIN,AVG2 @ (1 * 2D)]1 2
Select the number of input capacitors (N IN ) to provide the
rms input current (I CIN,RMS ) based on the rms ripple current
rating per capacitor (I RMS,RATED ).
(12)
For a two?phase converter with perfect efficiency ( η = 1),
the worst case input ripple current will occur when the
converter is operating at a 25% duty cycle. At this operating
where
IIN,AVG + IO,MAX @ D h
(5)
point, the parallel combination of input capacitors must
support an rms ripple current equal to 25% of the converter’s
dc output current. At other duty cycles, the ripple current
D
is the duty cycle of the converter,
will be less. For example, at a duty cycle of either 10% or
D = V CORE /V IN ,
η is the specified minimum efficiency,
I O,MAX is the maximum converter output current.
The input capacitors will discharge when the control FET
is ON and charge when the control FET is OFF as shown in
Figure 30.
The following equations will determine the maximum and
minimum currents delivered by the input capacitors.
40%, the two?phase input ripple current will be
approximately 20% of the converter ’s dc output current.
In general, capacitor manufacturers require derating to the
specified ripple current based on the ambient temperature.
More capacitors will be required because of the current
derating. The designer should be cognizant of the ESR of the
input capacitors. The input capacitor power loss can be
calculated from
IC,MAX + ILo,MAX h * IIN,AVG
IC,MIN + ILo,MIN h * IIN,AVG
I Lo,MAX is the maximum output inductor current.
(6)
(7)
PCIN + ICIN,RMS2 @ ESR_per_capacitor NIN (13)
Low ESR capacitors are recommended to minimize losses
and reduce capacitor heating. The life of an electrolytic
capacitor is reduced 50% for every 10 ° C rise in the
capacitor ’s temperature.
http://onsemi.com
25
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