参数资料
型号: NT5SV8M16FT-75BI
厂商: NANYA TECHNOLOGY CORP
元件分类: DRAM
英文描述: 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封装: 0.400 MM, PLASTIC, TSSOP2-54
文件页数: 17/65页
文件大小: 739K
代理商: NT5SV8M16FT-75BI
NT5SV8M16FS / NT5SV8M16FT
128Mb Synchronous DRAM
REV 1.4
08/2009
24
NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Burst write operations will be terminated by the Precharge command. The last write data that will be properly stored in the
device is that write data that is presented to the device a number of clock cycles prior to the Precharge command equal to the
Data-in to Precharge delay, tDPL.
Precharge Termination of a Burst Write
COMMAND
NOP
WRITE Ax0
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
NOP
DIN Ax1
DIN Ax2
tDPL
DIN Ax0
tCK2, DQs
CAS latency = 2
NOP
DIN Ax1
DIN Ax2
DIN Ax0
tCK3, DQs
CAS latency = 3
DQM
Precharge A
t
DPL is an asynchronous timing and may be completed in one or two clock cycles
depending on clock cycle time.
(Burst Length = 8, CAS Latency = 2, 3)
tDPL
相关PDF资料
PDF描述
NT5TU64M16DG-3C 64M X 16 DDR DRAM, 0.45 ns, PBGA84
NTA2425E
NTA2425F
NTA2410-10
NTD2410F
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