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参数资料
| 型号： | NT5SV8M16FT-75BI |
| 厂商： | NANYA TECHNOLOGY CORP |
| 元件分类： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封装： | 0.400 MM, PLASTIC, TSSOP2-54 |
| 文件页数： | 26/65页 |
| 文件大小： | 739K |
| 代理商： | NT5SV8M16FT-75BI |
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NT5SV8M16FS / NT5SV8M16FT
128Mb Synchronous DRAM
REV 1.4
08/2009
32
NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Read with
Auto Pre-
charge
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
BS
X
Precharge
ILLEGAL
4
L
H
BS
Row Address Bank Activate
ILLEGAL
4
L
H
L
BS
Column
Write
ILLEGAL
4
L
H
L
H
BS
Column
Read
ILLEGAL
4
L
H
X
No Operation
Continue the Burst
H
X
Device Deselect
Continue the Burst
Write with Auto
Precharge
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
BS
X
Precharge
ILLEGAL
4
L
H
BS
Row Address Bank Activate
ILLEGAL
4
L
H
L
BS
Column
Write
ILLEGAL
4
L
H
L
H
BS
Column
Read
ILLEGAL
4
L
H
X
No Operation
Continue the Burst
H
X
Device Deselect
Continue the Burst
Precharging
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
BS
X
Precharge
No Operation; Bank(s) idle after tRP
L
H
BS
Row Address Bank Activate
ILLEGAL
4
L
H
L
BS
Column
Write
ILLEGAL
4
L
H
L
H
BS
Column
Read
ILLEGAL
4
L
H
X
No Operation
No Operation; Bank(s) idle after tRP
H
X
Device Deselect
No Operation; Bank(s) idle after tRP
Row
Activating
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
BS
X
Precharge
ILLEGAL
4
L
H
BS
Row Address Bank Activate
ILLEGAL
4, 10
L
H
L
BS
Column
Write
ILLEGAL
4
L
H
L
H
BS
Column
Read
ILLEGAL
4
L
H
X
No Operation
No Operation; Row Active after tRCD
H
X
Device Deselect
No Operation; Row Active after tRCD
Current State Truth Table (Part 2 of 3)(See note 1)
Current State
Command
Action
Notes
CS
RAS CAS WE
BA0,BA1
A11 - A0
Description
1. CKE is assumed to be active (high) in the previous cycle for all entries. The Current State is the state of the bank that the Command is
being applied to.
2. All Banks must be idle; otherwise, it is an illegal action.
3. If CKE is active (high) the SDRAM will start the Auto (CBR) Refresh operation, if CKE is inactive (low) than the Self Refresh mode is
entered.
4. The Current State refers to only one of the banks. If BS selects this bank then the action is illegal. If BS selects the bank not being refer-
enced by the Current State then the action may be legal depending on the state of that bank.
5. If CKE is inactive (low) then the Power Down mode is entered; otherwise there is a No Operation.
6. The minimum and maximum Active time (tRAS) must be satisfied.
7. The RAS to CAS Delay (tRCD) must occur before the command is given.
8. Column address A10 is used to determine if the Auto Precharge function is activated.
9. The command must satisfy any bus contention, bus turn around, and/or write recovery requirements.
10. The command is illegal if the minimum bank to bank delay time (tRRD) is not satisfied.
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PDF描述 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NT5SV8M16HS-6K | 制造商:Nanya Technology Corporation 功能描述:DRAM |
| NT5SV8M8DT | 制造商:未知厂家 制造商全称:未知厂家 功能描述:64Mb Synchronous DRAM |
| NT5SV8M8DT-6K | 制造商:未知厂家 制造商全称:未知厂家 功能描述:64Mb Synchronous DRAM |
| NT5SV8M8DT-7 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:64Mb Synchronous DRAM |
| NT5SV8M8DT-7K | 制造商:未知厂家 制造商全称:未知厂家 功能描述:64Mb Synchronous DRAM |
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