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参数资料
| 型号： | NTMD2C02R2SG |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | MOSFET N/P-CH COMPL 20V 8-SOIC |
| 产品变化通告： | Wire Change 20/Aug/2008 Product Discontinuation 01/Oct/2008 |
| 标准包装： | 2,500 |
| FET 型： | N 和 P 沟道 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 20V |
| 电流 - 连续漏极(Id) @ 25° C： | 5.2A，3.4A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 43 毫欧 @ 4A，4.5V |
| Id 时的 Vgs(th)（最大）： | 1.2V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 20nC @ 4.5V |
| 输入电容 (Ciss) @ Vds： | 1100pF @ 10V |
| 功率 - 最大： | 2W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
NTMD2C02R2
di/dt = 300 A/ m s
Standard Cell Density
t rr
High Cell Density
t a
t rr
t b
t, TIME
Figure 21. Reverse Recovery Time (t rr )
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain ? to ? source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (T C ) of 25 ° C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance ?
General Data and Its Use.”
Switching between the off ? state and the on ? state may
traverse any load line provided neither rated peak current
(I DM ) nor rated voltage (V DSS ) is exceeded, and that the
transition time (t r , t f ) does not exceed 10 m s. In addition the
N ? Channel
total power averaged over a complete switching cycle must
not exceed (T J(MAX) ? T C )/(R q JC ).
A power MOSFET designated E ? FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and must be adjusted for operating
conditions differing from those specified. Although industry
practice is to rate in terms of energy, avalanche energy
capability is not a constant. The energy rating decreases
non ? linearly with an increase of peak current in avalanche
and peak junction temperature.
P ? Channel
100
10
V GS = 20 V
SINGLE PULSE
T C = 25 ° C
10 ms
10 m s
100 m s
1 ms
100
10
V GS = 8 V
SINGLE PULSE
T C = 25 ° C
Mounted on 2 ″ sq. FR4 board (1 ″ sq. 2 oz. Cu 0.06 ″
thick single sided) with one die operating, 10s max.
1 ms
10 ms
1
dc
1
dc
R DS(on) LIMIT
0.1
THERMAL LIMIT
PACKAGE LIMIT
0.1
R DS(on) LIMIT
0.01
Mounted on 2 ″ sq. FR4 board (1 ″ sq. 2 oz. Cu 0.06 ″
thick single sided) with one die operating, 10s max.
0.1 1 10
100
0.01
0.1
THERMAL LIMIT
PACKAGE LIMIT
1
10
100
V DS , DRAIN ? TO ? SOURCE VOLTAGE (VOLTS)
Figure 22. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
8
V DS , DRAIN ? TO ? SOURCE VOLTAGE (VOLTS)
Figure 23. Maximum Rated Forward Biased
Safe Operating Area
相关PDF资料 |
PDF描述 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NTMD2P01R2 | 功能描述:MOSFET -16V 2.3A Dual RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| NTMD2P01R2G | 功能描述:MOSFET -16V 2.3A Dual P-Channel RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| NTMD3N08 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 80V V(BR)DSS | SO |
| NTMD3N08/D | 制造商:未知厂家 制造商全称:未知厂家 功能描述:80 V Power MOSFET |
| NTMD3N08L | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TRANSISTOR | MOSFET | MATCHED PAIR | N-CHANNEL | 80V V(BR)DSS | SO |
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