参数资料
型号: ORSO42G5-3BMN484C
厂商: Lattice Semiconductor Corporation
文件页数: 6/153页
文件大小: 0K
描述: IC TRANCEIVERS FPSC 680FPGAM
产品变化通告: Product Discontinuation 01/Aug/2011
标准包装: 60
系列: *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
103
30A04
[0]
RSVD
00
Reserved
[1]
FMPU_RESYNC4_B
Control to resync 4 channels which have been
congured for multi channel alignment in
SONET mode in block B. Requires a rising edge
on this bit. Write a 0 followed by a 1.
SONET
[2]
FMPU_RESYNC2_B2
Control to resync channels BC and BD which
have been congured for multi channel align-
ment in SONET mode in block B. Requires a ris-
ing edge on this bit. Write a 0 followed by a 1.
SONET
[3]
FMPU_RESYNC2_B1
Control to resync channels BA and BB which
have been congured for multi channel align-
ment in SONET mode in block B. Requires a ris-
ing edge on this bit. Write a 0 followed by a 1.
SONET
[4]
FMPU_RESYNC4_A
Control to resync 4 channels which have been
congured for multi channel alignment in
SONET mode in block A. Requires a rising edge
on this bit. Write a 0 followed by a 1.
SONET
[5]
FMPU_RESYNC2_A2
Control to resync channels AC and AD which
have been congured for multi channel align-
ment in SONET mode in block A. Requires a
rising edge on this bit. Write a 0 followed by a 1.
SONET
[6]
FMPU_RESYNC2_A1
Control to resync channels AA and AB which
have been congured for multi channel align-
ment in SONET mode in block A. Requires a
rising edge on this bit. Write a 0 followed by a 1.
SONET
[7]
FMPU_RESYNC8
Control to resync all 8 channels which have
been congured for multi channel alignment.
SONET
Table 36. Common Control Register Descriptions – ORSO82G5 (Continued)
(0x)
Absolute
Address
Bit
Name
Reset
Value
(0x)
Description
Mode
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