参数资料
型号: ORSO42G5-3BMN484C
厂商: Lattice Semiconductor Corporation
文件页数: 88/153页
文件大小: 0K
描述: IC TRANCEIVERS FPSC 680FPGAM
产品变化通告: Product Discontinuation 01/Aug/2011
标准包装: 60
系列: *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
4
Optional cell processing blocks included. Cell processing includes cell creation, extraction, idle cell insertion and
deletion asynchronous from line rates. Four cell sizes supported:
– 77 bytes per cell (75 bytes of data payload)
– 81 bytes per cell (79 bytes of data payload)
– 85 bytes per cell (83 bytes of data payload)
– 93 bytes per cell (91 bytes of data payload)
Automatic cell striping across either pairs of SERDES links or, for the ORSO82G5, all eight SERDES links.
Addition of two 4K X 36 dual-port RAMs accessible by the programmable logic.
Programmable Features
High-performance programmable logic:
– 0.16 m 7-level metal technology.
– Internal performance of >250 MHz.
– Over 400K usable system gates.
– Meets multiple I/O interface standards.
– 1.5V operation (30% less power than 1.8V operation) translates to greater performance.
Traditional I/O selections:
– LVTTL (3.3V) and LVCMOS (2.5V, and 1.8V) I/Os.
– Per pin-selectable I/O clamping diodes provide 3.3V PCI compliance.
– Individually programmable drive capability:
24 mA sink/12 mA source, 12 mA sink/6 mA source, or 6 mA sink/3 mA source.
– Two slew rates supported (fast and slew-limited).
– Fast-capture input latch and input Flip-Flop (FF)/latch for reduced input setup time and zero hold time.
– Fast open-drain drive capability.
– Capability to register 3-state enable signal.
– Off-chip clock drive capability.
– Two-input function generator in output path.
New programmable high-speed I/O:
– Single-ended: GTL, GTL+, PECL, SSTL3/2 (class I and II), HSTL (Class I, III, IV), ZBT, and DDR.
– Double-ended: LVDS, bused-LVDS, and LVPECL. Programmable (on/off), internal parallel termination (100 Ω)
is also supported for these I/Os.
New capability to (de)multiplex I/O signals:
– New DDR on both input and output.
– New 2x and 4x downlink and uplink capability per I/O.
Enhanced twin-block Programmable Function Unit (PFU):
– Eight 16-bit Look-Up Tables (LUTs) per PFU.
– Nine user registers per PFU, one following each LUT, and organized to allow two nibbles to act indepen-
dently, plus one extra for arithmetic operations.
– New register control in each PFU has two independent programmable clocks, clock enables, local set/reset,
and data selects.
– New LUT structure allows exible combinations of LUT4, LUT5, new LUT6, 4 → 1 MUX, new 8 → 1 MUX,
and ripple mode arithmetic functions in the same PFU.
– 32 x 4 RAM per PFU, congurable as single-port or dual-port. Create large, fast RAM/ROM blocks (128 x 8
in only eight PFUs) using the Supplemental Logic and Interconnect Cell (SLIC) decoders as bank drivers.
– Soft-Wired LUTs (SWL) allow fast cascading of up to three levels of LUT logic in a single PFU through fast
internal routing which reduces routing congestion and improves speed.
– Flexible fast access to PFU inputs from routing.
– Fast-carry logic and routing to all four adjacent PFUs for nibble-wide, byte-wide, or longer arithmetic func-
tions, with the option to register the PFU carry-out.
相关PDF资料
PDF描述
ORT82G5-1FN680I IC TRANCEIVERS FPSC 680FPBGA
ORT82G5-2FN680I IC TRANCEIVERS FPSC 680FPBGA
VI-J4H-IW-F4 CONVERTER MOD DC/DC 52V 100W
VI-J4H-IW-F3 CONVERTER MOD DC/DC 52V 100W
ORT82G5-1FN680C IC TRANCEIVERS FPSC 680FPBGA
相关代理商/技术参数
参数描述
ORSO42G5-EV 功能描述:可编程逻辑 IC 开发工具 Eval Brd ORSO42G5 RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
ORSO82G5 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:0.6 to 2.7 Gbps SONET Backplane Interface FPSCs
ORSO82G5-1BM680C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO82G5-1BM680I 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO82G5-1F680C 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256