参数资料
型号: P89V51RB2BBC,557
厂商: NXP Semiconductors
文件页数: 20/80页
文件大小: 0K
描述: IC 80C51 MCU 1024 RAM 44TQFP
产品培训模块: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
标准包装: 800
系列: 89V
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 44-TQFP
包装: 托盘
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
其它名称: 935277723557
P89V51RB2BBC
P89V51RB2BBC-ND
P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
27 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
6.4 Timers/counters 0 and 1
The two 16-bit Timer/counter registers: Timer 0 and Timer 1 can be congured to operate
either as timers or event counters (see Table 14 and Table 15).
In the ‘Timer’ function, the register is incremented every machine cycle. Thus, one can
think of it as counting machine cycles. Since a machine cycle consists of six oscillator
periods, the count rate is 1
6 of the oscillator frequency.
In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T0 or T1. In this function, the external input is sampled
once every machine cycle.
When the samples show a high in one cycle and a low in the next cycle, the count is
incremented. The new count value appears in the register in the machine cycle following
the one in which the transition was detected. Since it takes two machine cycles (12
oscillator periods) for 1-to-0 transition to be recognized, the maximum count rate is 1
12 of
the oscillator frequency. There are no restrictions on the duty cycle of the external input
signal, but to ensure that a given level is sampled at least once before it changes, it should
be held for at least one full machine cycle. In addition to the ‘Timer’ or ‘Counter’ selection,
Timer 0 and Timer 1 have four operating modes from which to select.
The ‘Timer’ or ‘Counter’ function is selected by control bits C/T in the Special Function
Register TMOD. These two Timer/counters have four operating modes, which are
selected by bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for both
Timers/counters. Mode 3 is different. The four operating modes are described in the
following text.
Program Security Bit, Double
Clock
Input parameters:
R1 = 05H
DPL = 01H = security bit
DPL = 05H = Double Clock
Return parameter(s):
ACC = 00 = pass
ACC=!00=fail
Read Security Bit, Double Clock,
SoftICE
Input parameters:
ACC = 07H
Return parameter(s):
ACC = 00 SoftICE S/N-match 0 SB 0 DBL_CLK
Erase sector
Input parameters:
R1 = 08H
DPH = sector address high byte
DPL = sector address low byte
Return parameter(s):
ACC = 00 = pass
ACC = !00 = fail
Table 13.
IAP function calls …continued
IAP function
IAP call parameters
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