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参数资料
| 型号： | P89V51RB2BBC,557 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 72/80页 |
| 文件大小： | 0K |
| 描述： | IC 80C51 MCU 1024 RAM 44TQFP |
| 产品培训模块： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 标准包装： | 800 |
| 系列： | 89V |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 40MHz |
| 连通性： | SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 32 |
| 程序存储器容量： | 16KB（16K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 1K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 44-TQFP |
| 包装： | 托盘 |
| 配用： | 622-1017-ND - BOARD 44-ZIF PLCC SOCKET |
| 其它名称： | 935277723557 P89V51RB2BBC P89V51RB2BBC-ND |
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PIC18F87K22 FAMILY
DS39960D-page 74
2009-2011 Microchip Technology Inc.
REGISTER 5-1:
RCON: RESET CONTROL REGISTER
R/W-0
R/W-1
R-1
R/W-0
IPEN
SBOREN
CM
RI
TO
PD
POR
BOR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
IPEN:
Interrupt Priority Enable bit
1
= Enable priority levels on interrupts
0
= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6
SBOREN:
BOR Software Enable bit
If BOREN<1:0> = 01:
1
= BOR is enabled
0
= BOR is disabled
If BOREN<1:0> = 00, 10 or 11:
Bit is disabled and read as ‘0’.
bit 5
CM:
Configuration Mismatch Flag bit
1
= A Configuration Mismatch Reset has not occurred
0
= A Configuration Mismatch Reset has occurred (must be set in software after a Configuration
Mismatch Reset occurs)
bit 4
RI: RESET
Instruction Flag bit
1
= The RESET instruction was not executed (set by firmware only)
0
= The RESET instruction was executed causing a device Reset (must be set in software after a
Brown-out Reset occurs)
bit 3
TO:
Watchdog Time-out Flag bit
1
= Set by power-up, CLRWDT instruction or SLEEP instruction
0
= A WDT time-out occurred
bit 2
PD:
Power-Down Detection Flag bit
1
= Set by power-up or by the CLRWDT instruction
0
= Set by execution of the SLEEP instruction
bit 1
POR:
Power-on Reset Status bit
1
= A Power-on Reset has not occurred (set by firmware only)
0
= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOR:
Brown-out Reset Status bit
1
= A Brown-out Reset has not occurred (set by firmware only)
0
= A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Note 1:
It is recommended that the POR bit be set after a Power-on Reset has been detected, so that subsequent
Power-on Resets may be detected.
2:
Brown-out Reset is said to have occurred when BOR is ‘0’ and POR is ‘1’ (assuming that POR was set to
‘1’ by software immediately after a Power-on Reset).
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