参数资料
型号: PI7C7300DNAE
厂商: Pericom
文件页数: 103/107页
文件大小: 0K
描述: IC PCI-PCI BRIDGE 3PORT 272-BGA
标准包装: 40
系列: *
应用: *
接口: *
电源电压: *
封装/外壳: 272-BBGA
供应商设备封装: 272-PBGA(27x27)
包装: 管件
安装类型: 表面贴装
PI7C7300D
3-PORT PCI-TO-PCI BRIDGE
Page 95 of 107
Pericom Semiconductor
November 2005 - Revision 1.01
15.1
BRIDGE ACTIONS FOR VARIOUS CYCLE TYPES
Initiator
Target
Response
Master on Primary
Target on Primary
PI7C7300D does not respond. It detects
this situation by decoding the address as
well as monitoring the P_DEVSEL# for
other fast and medium devices on the
Primary Port.
Master on Primary
Target on Secondary
PI7C7300D asserts P_DEVSEL#,
terminates the cycle normally if it is able
to be posted, otherwise return with a retry.
It then passes the cycle to the appropriate
port. When the cycle is complete on the
target port, it will wait for the initiator to
repeat the same cycle and end with normal
termination.
Master on Primary
Target not on Primary nor
Secondary Port
PI7C7300D does not respond and the
cycle will terminate as master abort.
Master on Secondary
Target on the same
Secondary Port
PI7C7300D does not respond.
Master on Secondary
Target on Primary or the
other Secondary Port
PI7C7300D asserts S1_DEVSEL# or
S2_DEVSEL#, terminates the cycle
normally if it is able to be posted,
otherwise returns with a retry. It then
passes the cycle to the appropriate port.
When cycle is complete on the target port,
it will wait for the initiator to repeat the
same cycle and end with normal
termination.
Master on Secondary
Target not on Primary nor
the other Secondary Port
PI7C7300D does not respond.
15.2
TRANSACTION ORDERING
To maintain data coherency and consistency, PI7C7300D complies with the ordering
rules put forth in the PCI Local Bus Specification, Rev 2.2. The following table
summarizes the ordering relationship of all the transactions through the bridge.
PMW - Posted write (either memory write or memory write & invalidate)
DRR - Delayed read request (all memory read, I/O read & configuration read)
DWR - Delayed write request (I/O write & configuration write, memory write to
certain location)
DRC - Delayed read completion (all memory read, I/O read & configuration read)
DWC - Delayed write completion (I/O write & configuration write, memory write
to ccertain location
Cycle type shown on each row is the subsequent cycle after the previous shown on the
column.
Can Row Pass Column?
PMW
Column 1
DRR
Column 2
DWR
Column 3
DRC
Column 4
DWC
Column 5
PMW (Row 1)
No
Yes
DRR (Row 2)
No
Yes
DWR (Row 3)
No
Yes
DRC (Row 4)
No
Yes
No
相关PDF资料
PDF描述
PI7C8140AMAE IC PCI-PCI BRIDGE 2PORT 128-QFP
PI7C8150ANDE IC PCI-PCI BRIDGE 2PORT 256-PBGA
PI7C8150BNDIE IC PCI-PCI BRIDGE ASYNC 256-PBGA
PI7C8152BMAIE IC PCI-PCI BRIDGE 2PORT 160-MQFP
PI7C8154ANAE IC PCI-PCI BRIDGE ASYNC 304-PBGA
相关代理商/技术参数
参数描述
PI7C7300EVB 功能描述:界面开发工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V
PI7C8140A 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON
PI7C8140AEVB 功能描述:界面开发工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V
PI7C8140AMA 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge
PI7C8140AMAE 功能描述:外围驱动器与原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray