参数资料
| 型号： | PI7C7300DNAE |
| 厂商： | Pericom |
| 文件页数： | 91/107页 |
| 文件大小： | 0K |
| 描述： | IC PCI-PCI BRIDGE 3PORT 272-BGA |
| 标准包装： | 40 |
| 系列： | * |
| 应用： | * |
| 接口： | * |
| 电源电压： | * |
| 封装/外壳： | 272-BBGA |
| 供应商设备封装： | 272-PBGA（27x27） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
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PI7C7300D
3-PORT PCI-TO-PCI BRIDGE
Page 84 of 107
Pericom Semiconductor
November 2005 - Revision 1.01
Bit
Function
Type
Description
18
ISA enable
R/W
Modifies the bridge’s response to ISA I/O addresses, applying only to
those addresses falling within the I/O base and limit address registers
and within the first 64KB or PCI I/O space.
0: forward all I/O addresses in the range defined by the I/O base and
I/O limit registers
1: blocks forwarding of ISA I/O addresses in the range defined by the
I/O base and I/O limit registers that are in the first 64KB of I/O space
that address the last 768 bytes in each 1KB block. Secondary I/O
transactions are forwarded upstream if the address falls within the last
768 bytes in each 1KB block
Reset to 0
19
VGA enable
R/W
Controls the bridge’s response to VGA compatible addresses.
0: does not forward VGA compatible memory and I/O addresses from
primary to secondary
1: forward VGA compatible memory and I/O addresses from primary
to secondary regardless of other settings
Reset to 0
20
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0
21
Master Abort
Mode
R/W
Control’s bridge’s behavior responding to master aborts on secondary
interface.
0: does not report master aborts (returns FFFF_FFFFh on reads and
discards data on writes)
1: reports master aborts by signaling target abort if possible by the
assertion of P_SERR# if enabled
Reset to 0
22
Secondary
Interface Reset
R/W
Controls the assertion of S1_RESET# or S2_RESET# signal pin on
the secondary interface
0: does not force the assertion of S1_RESET# or S2_RESET# pin
1: forces the assertion of S1_RESET# or S2_RESET#
Reset to 0
23
Fast Back-to-
Back Enable
R/W
Controls bridge’s ability to generate fast back-to-back transactions to
different devices on the secondary interface.
0: does not allow fast back-to-back transactions
1: enables fast back-to-back transactions
Reset to 0
24
Reserved
R/W
Reserved. Reset to 0
25
Reserved
R/W
Reserved. Reset to 0
26
Master Timeout
Status
R/WC
This bit is set to 1 when either the primary master timeout counter or
secondary master timeout counter expires.
Reset to 0
27
Discard Timer
P_SERR# enable
R/WC
This bit Is set to 1 and P_SERR# is asserted when either the primary
discard timer or the secondary S1 or S2 discard timer expire.
Reset to 0
31-28
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PI7C7300EVB | 功能描述:界面开发工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| PI7C8140A | 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8140AEVB | 功能描述:界面开发工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| PI7C8140AMA | 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
| PI7C8140AMAE | 功能描述:外围驱动器与原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
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