参数资料
型号: PI7C7300DNAE
厂商: Pericom
文件页数: 85/107页
文件大小: 0K
描述: IC PCI-PCI BRIDGE 3PORT 272-BGA
标准包装: 40
系列: *
应用: *
接口: *
电源电压: *
封装/外壳: 272-BBGA
供应商设备封装: 272-PBGA(27x27)
包装: 管件
安装类型: 表面贴装
PI7C7300D
3-PORT PCI-TO-PCI BRIDGE
Page 79 of 107
Pericom Semiconductor
November 2005 - Revision 1.01
14.1.9
HEADER TYPE REGISTER – OFFSET 0Ch
Configuration Register 1
Bit
Function
Type
Description
23:16
Header Type
R/O
Read as 81h to designate function 0 (multiple function PCI-to-PCI
bridge for secondary bus S1)
Configuration Register 2
Bit
Function
Type
Description
23:16
Header Type
R/O
Read as 01h to designate function 1 (single function PCI-to-PCI
bridge for secondary bus S2)
14.1.10
PRIMARY BUS NUMBER REGISTER – OFFSET 18h
Bit
Function
Type
Description
7:0
Primary Bus
Number
R/W
Indicates the number of the PCI bus to which the primary interface
is connected. The value is set in software during configuration.
Reset to 0
14.1.11
SECONDARY (S1 or S2) BUS NUMBER REGISTER – OFFSET 18h
Bit
Function
Type
Description
15:8
Secondary (S1 or
S2) Bus Number
R/W
Indicates the number of the PCI bus to which the secondary
interface (S1 or S2) is connected. The value is set in software
during configuration.
Reset to 0
14.1.12
SUBORDINATE (S1 or S2) BUS NUMBER REGISTER – OFFSET
18h
Bit
Function
Type
Description
23:16
Subordinate
(S1 or S2) Bus
Number
R/W
Indicates the number of the PCI bus with the highest number that is
subordinate to the bridge. The value is set in software during
configuration.
Reset to 0
14.1.13
SECONDARY LATENCY TIMER REGISTER – OFFSET 18h
Bit
Function
Type
Description
31:24
Secondary
Latency Timer
R/W
Designated in units of PCI bus clocks. Latency timer checks for
master accesses on the secondary bus interfaces that remain
unclaimed by any target.
Reset to 0
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