参数资料
| 型号： | PI7C7300DNAE |
| 厂商： | Pericom |
| 文件页数： | 98/107页 |
| 文件大小： | 0K |
| 描述： | IC PCI-PCI BRIDGE 3PORT 272-BGA |
| 标准包装： | 40 |
| 系列： | * |
| 应用： | * |
| 接口： | * |
| 电源电压： | * |
| 封装/外壳： | 272-BBGA |
| 供应商设备封装： | 272-PBGA（27x27） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
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PI7C7300D
3-PORT PCI-TO-PCI BRIDGE
Page 90 of 107
Pericom Semiconductor
November 2005 - Revision 1.01
Bit
Function
Type
Description
1
Primary MEMR
Command Alias
Enable
R/W
Controls PI7C7300D’s detection mechanism for matching memory
read retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from
initiator on the primary interface
1: alias MEMRL or MEMRM to MEMR for memory read retry
cycles from the initiator on the primary interface
Reset to 0
2
Primary MEMW
Command Alias
Enable
R/W
Controls PI7C7300D’s detection mechanism for matching non-posted
memory write retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from
initiator on the primary interface
1: alias MEMWI to MEMW for non-posted memory write retry
cycles from initiator on the primary interface
Reset to 0
3
Secondary
MEMR
Command Alias
Enable
R/W
Controls PI7C7300D’s detection mechanism for matching memory
read retry cycles from the initiator on S1
0: exact matching for memory read retry cycles from initiator on the
S1 or S2 interface
1: alias MEMRL or MEMRM to MEMR for memory read retry
cycles from initiator on the S1 or S2 interface
Reset to 0
4
Secondary
MEMW
Command Alias
Enable
R/W
Controls PI7C7300D’s detection mechanism for matching non-posted
memory write retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from
initiator on the S1 or S2 interface
1: alias MEMWI to MEMW for non-posted memory write retry
cycles from initiator on the S1 or S2 interface
Reset to 0
8:5
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0.
9
Enable Long
Request
R/W
Controls PI7C7300D’s ability to enable long requests for lock cycles
0: normal lock operation
1: enable long request for lock cycle
Reset to 0
10
Enable
Secondary To
Hold Request
Longer
R/W
Control’s PI7C7300D’s ability to enable S1 or S2 to hold requests
longer.
0: internal S1 or S2 master will release REQ# after FRAME#
assertion
1: internal S1 or S2 master will hold REQ# until there is no
transactions pending in FIFO or until terminated by target
Reset to 0
11
Enable Primary
To Hold Request
Longer
R/W
Control’s PI7C7300D’s ability to hold requests longer at the Primary
Port.
0: internal Primary master will release REQ# after FRAME#
assertion
1: internal Primary master will hold REQ# until there is no
transactions pending in FIFO or until terminated by target
Reset to 0
15:12
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0.
相关PDF资料 |
PDF描述 |
|---|---|
| PI7C8140AMAE | IC PCI-PCI BRIDGE 2PORT 128-QFP |
| PI7C8150ANDE | IC PCI-PCI BRIDGE 2PORT 256-PBGA |
| PI7C8150BNDIE | IC PCI-PCI BRIDGE ASYNC 256-PBGA |
| PI7C8152BMAIE | IC PCI-PCI BRIDGE 2PORT 160-MQFP |
| PI7C8154ANAE | IC PCI-PCI BRIDGE ASYNC 304-PBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PI7C7300EVB | 功能描述:界面开发工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| PI7C8140A | 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8140AEVB | 功能描述:界面开发工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| PI7C8140AMA | 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
| PI7C8140AMAE | 功能描述:外围驱动器与原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
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