参数资料
型号: PIC18LF96J65-I/PT
厂商: Microchip Technology
文件页数: 19/131页
文件大小: 0K
描述: IC PIC MCU FLASH 48KX16 100TQFP
标准包装: 90
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 41.667MHz
连通性: EBI/EMI,以太网,I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 70
程序存储器容量: 96KB(48K x 16)
程序存储器类型: 闪存
RAM 容量: 3808 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 3.6 V
数据转换器: A/D 16x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 100-TQFP
包装: 托盘
2011 Microchip Technology Inc.
DS39762F-page 115
PIC18F97J60 FAMILY
8.0
EXTERNAL MEMORY BUS
The External Memory Bus (EMB) allows the device to
access external memory devices (such as Flash,
EPROM, SRAM, etc.) as program or data memory. It
supports both 8 and 16-Bit Data Width modes, and
three address widths of up to 20 bits.
The bus is implemented with 28 pins, multiplexed
across four I/O ports. Three ports (PORTD, PORTE
and PORTH) are multiplexed with the address/data bus
for a total of 20 available lines, while PORTJ is
multiplexed with the bus control signals.
A list of the pins and their functions is provided in
TABLE 8-1:
PIC18F96J60/96J65/97J60 EXTERNAL MEMORY BUS – I/O PORT FUNCTIONS
Note:
The
external
memory
bus
is
not
implemented on 64-pin and 80-pin
devices.
Name
Port
Bit
External Memory Bus Function
RD0/AD0
PORTD
0
Address Bit 0 or Data Bit 0
RD1/AD1
PORTD
1
Address Bit 1 or Data Bit 1
RD2/AD2
PORTD
2
Address Bit 2 or Data Bit 2
RD3/AD3
PORTD
3
Address Bit 3 or Data Bit 3
RD4/AD4
PORTD
4
Address Bit 4 or Data Bit 4
RD5/AD5
PORTD
5
Address Bit 5 or Data Bit 5
RD6/AD6
PORTD
6
Address Bit 6 or Data Bit 6
RD7/AD7
PORTD
7
Address Bit 7 or Data Bit 7
RE0/AD8
PORTE
0
Address Bit 8 or Data Bit 8
RE1/AD9
PORTE
1
Address Bit 9 or Data Bit 9
RE2/AD10
PORTE
2
Address Bit 10 or Data Bit 10
RE3/AD11
PORTE
3
Address Bit 11 or Data Bit 11
RE4/AD12
PORTE
4
Address Bit 12 or Data Bit 12
RE5/AD13
PORTE
5
Address Bit 13 or Data Bit 13
RE6/AD14
PORTE
6
Address Bit 14 or Data Bit 14
RE7/AD15
PORTE
7
Address Bit 15 or Data Bit 15
RH0/A16
PORTH
0
Address Bit 16
RH1/A17
PORTH
1
Address Bit 17
RH2/A18
PORTH
2
Address Bit 18
RH3/A19
PORTH
3
Address Bit 19
RJ0/ALE
PORTJ
0
Address Latch Enable (ALE) Control bit
RJ1/OE
PORTJ
1
Output Enable (OE) Control bit
RJ2/WRL
PORTJ
2
Write Low (WRL) Control bit
RJ3/WRH
PORTJ
3
Write High (WRH) Control bit
RJ4/BA0
PORTJ
4
Byte Address (BA0) Bit 0
RJ5/CE
PORTJ
5
Chip Enable (CE) Control bit
RJ6/LB
PORTJ
6
Lower Byte Enable (LB) Control bit
RJ7/UB
PORTJ
7
Upper Byte Enable (UB) Control bit
Note:
For the sake of clarity, only I/O port and external bus assignments are shown here. One or more additional
multiplexed features may be available in some pins.
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