参数资料
型号: PIC18LF96J65-I/PT
厂商: Microchip Technology
文件页数: 5/131页
文件大小: 0K
描述: IC PIC MCU FLASH 48KX16 100TQFP
标准包装: 90
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 41.667MHz
连通性: EBI/EMI,以太网,I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 70
程序存储器容量: 96KB(48K x 16)
程序存储器类型: 闪存
RAM 容量: 3808 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 3.6 V
数据转换器: A/D 16x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 100-TQFP
包装: 托盘
PIC18F97J60 FAMILY
DS39762F-page 102
2011 Microchip Technology Inc.
FIGURE 6-10:
COMPARING ADDRESSING OPTIONS FOR BIT-ORIENTED AND
BYTE-ORIENTED INSTRUCTIONS (EXTENDED INSTRUCTION SET ENABLED)
EXAMPLE INSTRUCTION: ADDWF, f, d, a
(Opcode: 0010 01da ffff ffff
When a = 0 and f
60h:
The instruction executes in
Direct Forced mode. ‘f’ is
interpreted as a location in the
Access RAM between 060h
and FFFh. This is the same as
locations
F60h
to
FFFh
(Bank 15) of data memory.
Locations below 060h are not
available in this addressing
mode.
When a = 0 and f
5Fh:
The instruction executes in
Indexed Literal Offset mode. ‘f’
is interpreted as an offset to the
address value in FSR2. The
two are added together to
obtain the address of the target
register for the instruction. The
address can be anywhere in
the data memory space.
Note that in this mode, the
correct syntax is now:
ADDWF [k], d
where ‘k’ is the same as ‘f’.
When a = 1 (all values of f):
The instruction executes in
Direct mode (also known as
Direct Long mode). ‘f’ is
interpreted as a location in
one of the 16 banks of the data
memory space. The bank is
designated by the Bank Select
Register (BSR). The address
can be in any implemented
bank in the data memory
space.
000h
060h
100h
F00h
F40h
FFFh
Valid Range
00h
60h
FFh
Data Memory
Access RAM
Bank 0
Bank 1
through
Bank 14
Bank 15
SFRs
000h
060h
100h
F00h
F40h
FFFh
Data Memory
Bank 0
Bank 1
through
Bank 14
Bank 15
SFRs
FSR2H
FSR2L
ffffffff
001001da
ffffffff
001001da
000h
060h
100h
F00h
F40h
FFFh
Data Memory
Bank 0
Bank 1
through
Bank 14
Bank 15
SFRs
for ‘f’
BSR
00000000
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