
III PERIPHERAL MODULES 1 (SYSTEM): MISC REGISTERS
S1C33E07 TECHNICAL MANUAL
EPSON
III-4-7
III
MISC
III.4.6 Details of Control Registers
Table III.4.6.1 List of Misc Registers
Address
0x00300010
0x00300012
0x00300014
0x00300016
0x00300018
0x0030001A
0x00300020
0x00300C41
0x00300C42
0x00300C43
0x00300C44
0x00300C45
0x00300C46
0x00300C47
0x00300C48
0x00300C49
0x00300C4A
0x00300C4B
0x00300C4C
0x00300C4D
Function
Sets the RTC register access wait cycle.
Sets the USB register access wait cycle.
Configures the P15–P17 and P34–P36 pins for
debugging.
Test register
Indicates/sets boot conditions.
Test register
Enables/disables write protection of Misc registers.
Drives the bus signals low.
Controls the P0 port pull-up resistors.
Controls the P1 port pull-up resistors.
Controls the P2 port pull-up resistors.
Controls the P3 port pull-up resistors.
Controls the P4 port pull-up resistors.
Controls the P5 port pull-up resistors.
Controls the P6 port pull-up resistors.
Controls the P7 port pull-up resistors.
Controls the P8 port pull-up resistors.
Controls the P9 port pull-up resistors.
Controls the PA port pull-up resistors.
Controls the PB port pull-up resistors.
Register name
RTC Wait Control Register (pMISC_RTCWT)
USB Wait Control Register (pMISC_USBWT)
Debug Port MUX Register (pMISC_PMUX)
Performance Analyzer Control Register (pMISC_PAC)
Boot Register (pMISC_BOOT)
COROM Switch Register (pMISC_COROM)
Misc Protect Register (pMISC_PROT)
Bus Signal Low Drive Control Register (pMISC_BUSLOW)
P0 Pull-up Control Register (pMISC_PUP0)
P1 Pull-up Control Register (pMISC_PUP1)
P2 Pull-up Control Register (pMISC_PUP2)
P3 Pull-up Control Register (pMISC_PUP3)
P4 Pull-up Control Register (pMISC_PUP4)
P5 Pull-up Control Register (pMISC_PUP5)
P6 Pull-up Control Register (pMISC_PUP6)
P7 Pull-up Control Register (pMISC_PUP7)
P8 Pull-up Control Register (pMISC_PUP8)
P9 Pull-up Control Register (pMISC_PUP9)
PA Pull-up Control Register (pMISC_PUPA)
PB Pull-up Control Register (pMISC_PUPB)
Size
8
The following describes the Misc registers.
The Misc registers are mapped as 8-bit devices to Area 6 at addresses 0x300010 to 0x300020 and 0x300C41 to
0x300C4D, and can be accessed in units of bytes.
Note: The Misc registers at addresses 0x300010–0x30001A are write-protected. Before the Misc reg-
isters can be rewritten, write protection of these registers must be removed by writing data 0x96
to the Misc Protect Register (0x300020). Note that since unnecessary rewrites to addresses
0x300010–0x30001A could lead to erratic system operation, the Misc Protect Register (0x300020)
should be set to other than 0x96 unless said Misc registers must be rewritten.
The registers located from 0x300C41 to 0x300C4D are not protected.