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参数资料
| 型号： | S1R72V17B00A |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA60 |
| 封装： | 5 X 5 MM, 0.50 MM PITCH, PLASTIC, TFBGA-60 |
| 文件页数： | 28/45页 |
| 文件大小： | 3044K |
| 代理商： | S1R72V17B00A |
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6. Functional Description
14
EPSON
S1R72V17*** Technical Manual (Rev.1.6)
Table 6.5 lists the basic setup items for the general-purpose endpoints (EPa, EPb, Epc, Epd and EPe).
Since the endpoints EPa, EPb, EPc, EPd, and EPe can accept any transaction directions and endpoint
numbers set as desired, data transfers can be performed for up to five independent endpoints
simultaneously. Set up endpoints as appropriate for the contents of definitions of the USB-defined
interface and enable the set endpoints as necessary, to configure the USB-defined interface.
The FIFO areas for the endpoints EPa, EPb, Epc, Epd and EPe are set by the start and the end address
of each area. Any desired transaction can be executed by joining the FIFO area described later. First,
set AREAn{n=1-5}StartAdrs_H,L and AREAn{n=1-5}EndAdrs_H,L to reserve memory space for the
FIFO area to be used, and after initializing the FIFO area with AREAn{n=1-5}FIFO_Clr, set up
AREAn{n=1-5}Join_1.JoinEPxCHx{x=a-e} for the FIFO area used. No data transfers via a FIFO area
can be performed until this joining process is executed.
Table 6.5 Basic Setup Items of the General.purpose Endpoints
Item
Register/Bit
Description
Transaction direction
D_EPx{x=a-e}Config.INxOUT
Sets the direction of transfer at each
endpoint.
Max. packet size
D_EPx{x=a-e}MaxSize_H,
D_EPx{x=a-e}MaxSize_L
Sets the max packet size of each endpoint.
For the endpoints at which bulk transfer is to
be performed, however, set the Max. packet
size to 8, 16, 32, or 64 bytes during FS mode,
or to 512 bytes during HS mode.
Endpoint number
D_EPx{x=a-e}Config.EndpointNumber
Sets the endpoint number for each endpoint
to any value between 0x1 to 0xF.
Toggle mode
D_EPx{x=a-e}Config.IntEP_Mode
Sets the operation mode of interrupt transfer.
For the endpoints at which bulk transfer is to
be performed, always set this register bit to 0
irrespective of the transaction direction.
For the IN direction endpoints, set the mode
of toggle sequence.
For the OUT direction endpoints, if interrupt
transfer is to be performed, always set this
register bit to 0.
Isochronous mode
D_EPx{x=a-e}Config.ISO
To perform an Isochronous transfer, set this bit
to 1. For endpoints at which Bulk or Interrupt
transfers are performed, set this bit to 0.
FIFO area
AREAn{n=1-5}StartAdrs_H,
AREAn{n=1-5}StartAdrs _L,
AREAn{n=1-5}EndAdrs _H,
AREAn{n=1-5}EndAdrs _L
Sets the area to be allocated to each
endpoint by FIFO address.
Make sure the allocated FIFO area is equal to
or greater than the Max. packet size on each
channel. The size of the FIFO area affects the
throughput of data transfers.
For details on the allocation of FIFO areas, refer
to the relevant section in Chapter 6 on FIFOs.
FIFO area join
AREAn{n=1-5}Join_1.JoinEPxCHx{x=a-e}
Joins each endpoint to its allocated area.
Make sure each endpoint is joined to the
corresponding areas in the following
combinations. Note, however, that unused
endpoints cannot be joined to the FIFO areas.
Endpoint EPa: AREA1
Endpoint EPb: AREA2
Endpoint EPc: AREA3
Endpoint EPd: AREA4
Endpoint EPe: AREA5
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相关代理商/技术参数 |
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|---|---|
| S1R72V17B00A20 | 制造商:Epson Electronics America Inc 功能描述:USB HS HOST/DEVICE CONTROLLER, |
| S1R72V18 | 制造商:EPSON 制造商全称:EPSON 功能描述:Built-in pull-down resistor for downstream ports (no external circuit required) |
| S1R72V27 | 制造商:EPSON 制造商全称:EPSON 功能描述:Built-in pull-down resistor for downstream ports (no external circuit required) |
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