参数资料
型号: S29CL032J0RQAI033
厂商: SPANSION LLC
元件分类: PROM
英文描述: 1M X 32 FLASH 3.3V PROM, 48 ns, PQFP80
封装: PLASTIC, MO-108CB-1, QFP-80
文件页数: 28/79页
文件大小: 2994K
代理商: S29CL032J0RQAI033
34
S29CD-J & S29CL-J Flash Family
S29CD-J_CL-J_00_B3 March 30, 2009
Da ta
Sh e e t
8.7.7
Unlock Bypass
The device features an Unlock Bypass mode to facilitate faster programming, erasing (Chip Erase), as well
as CFI commands. Once the device enters the Unlock Bypass mode, only two write cycles are required to
program or erase data, instead of the normal four cycles for program or 6 cycles for erase. This results in
faster total programming/erasing time.
Section 20.1, Command Definitions on page 73 shows the requirements for the unlock bypass command
sequences.
During the unlock bypass mode only the Read, Unlock Bypass Program and Unlock Bypass Reset
commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock bypass
reset command sequence, which returns the device to read mode.
Notes
1. The Unlock Bypass Command is ignored if the Secured Silicon sector is enabled.
2. Unlike the standard program or erase commands, there is no Unlock Bypass Program/Erase
Suspend or Program/Erase Resume command.
8.7.8
Simultaneous Read/Write
The simultaneous read/write feature allows the host system to read data from one bank of memory while
programming or erasing in another bank of memory.
The Simultaneous Read/Write feature can be used to perform the following:
Programming in one bank, while reading in the other bank
Erasing in one bank, while reading in the other bank
Programming a PPB, while reading data from the large bank or status from the small bank
Erasing a PPB, while reading data from the large bank or status from the small bank
Any of the above situations while in the Secured Silicon Sector Mode
The Simultaneous R/W feature can not be performed during the following modes:
CFI Mode
Password Program operation
Password Verify operation
As an alternative to using the Simultaneous Read/Write feature, the user may also suspend an erase or
program operation to read in another location within the same bank (except for the sector being erased).
Restrictions
The Simultaneous Read/Write function is tested by executing an embedded operation in the small (busy)
bank while performing other operations in the big (non-busy) bank. However, the opposite case is neither
tested nor valid. That is, it is not tested by executing an embedded operation in the big (busy) bank while
performing other operations in the small (non-busy) bank.
8.8
Write Operation Status
The device provides several bits to determine the status of a program or erase operation. The following
subsections describe the function of DQ7, DQ6, DQ2, DQ5, DQ3, and RY/BY#.
相关PDF资料
PDF描述
SMCP-67201AV-25SHXXX 512 X 9 OTHER FIFO, 25 ns, CDIP28
SL0-67201AL-25SB 512 X 9 OTHER FIFO, 25 ns, UUC28
SL0-67201AL-30MHXXX 512 X 9 OTHER FIFO, 30 ns, UUC28
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